Nemanja Ivanovic 286a9532e8 [Power9] Add support for -mcpu=pwr9 in the back end ... This patch corresponds to review: http://reviews.llvm.org/D19683 Simply adds the bits for being able to specify -mcpu=pwr9 to the back end. llvm-svn: 268950		2016-05-09 18:54:58 +00:00
..
AArch64	[AArch64] Implement lowering of the X constraint on AArch64	2016-05-09 11:10:44 +00:00
AMDGPU	[AMDGPU] Clean up debugger tests	2016-05-09 18:05:42 +00:00
ARM	[ARM] Fix Scavenger assert due to underestimated stack size	2016-05-08 05:11:54 +00:00
BPF
Generic
Hexagon	[Hexagon] Treat all conditional branches as predicted (not-taken by default)	2016-05-09 18:22:07 +00:00
Inputs
Lanai
Mips	[mips][micromips] Make getPointerRegClass() result depend on the instruction.	2016-05-09 13:38:25 +00:00
MIR	ARM: fix handling of SUB immediates in peephole opt.	2016-05-02 18:30:08 +00:00
MSP430
NVPTX	[NVPTX] Fix sign/zero-extending ldg/ldu instruction selection	2016-05-02 18:12:02 +00:00
PowerPC	[Power9] Add support for -mcpu=pwr9 in the back end	2016-05-09 18:54:58 +00:00
SPARC	[Sparc] Allow taking of function address into a register.	2016-05-04 12:11:05 +00:00
SystemZ	[SystemZ] Implement backchain attribute (recommit with fix).	2016-05-05 00:37:30 +00:00
Thumb
Thumb2
WebAssembly	[WebAssembly] Don't emit epilogue code in the middle of stackified code.	2016-05-05 20:41:15 +00:00
WinEH
X86	[CGP] avoid crashing from weightlessness	2016-05-09 17:31:55 +00:00
XCore