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37de0ccb55
When these instructions are encoded in VEX (on AVX) there is no such requirement. This changes the folding tables and removes the alignment restrictions from VEX-encoded instructions. llvm-svn: 171024 |
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ARM | ||
CPP | ||
Generic | ||
Hexagon | ||
MBlaze | ||
Mips | ||
MSP430 | ||
NVPTX | ||
PowerPC | ||
R600 | ||
SI | ||
SPARC | ||
Thumb | ||
Thumb2 | ||
X86 | ||
XCore |