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3d387c31ad
Summary: no-odd-spreg-msa.ll: This test deliberately uses an odd-numbered register in inline assembly and expects the compiler to insert a move to an even-numbered register. inlineasm-operand-code.ll and inlineasm_constraint.ll: Checks for IAS's output will be added once a matcher bug is resolved. This bug causes the canonical output emitted by IAS to be incorrect for uimm16 constants with the MSB set. We will still need the non-IAS checks at this point since these tests primarily test formatting of operands. Reviewers: vkalintiris Subscribers: dsanders, llvm-commits Differential Revision: http://reviews.llvm.org/D14705 llvm-svn: 254148
74 lines
1.9 KiB
LLVM
74 lines
1.9 KiB
LLVM
; RUN: llc -no-integrated-as -march=mipsel < %s | \
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; RUN: FileCheck %s -check-prefix=ALL -check-prefix=GAS
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define void @constraint_I() nounwind {
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; First I with short
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; ALL-LABEL: constraint_I:
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; ALL: #APP
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; ALL: addiu ${{[0-9]+}}, ${{[0-9]+}}, 4096
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; ALL: #NO_APP
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tail call i16 asm sideeffect "addiu $0, $1, $2", "=r,r,I"(i16 7, i16 4096) nounwind
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; Then I with int
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; ALL: #APP
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; ALL: addiu ${{[0-9]+}}, ${{[0-9]+}}, -3
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; ALL: #NO_APP
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tail call i32 asm sideeffect "addiu $0, $1, $2", "=r,r,I"(i32 7, i32 -3) nounwind
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ret void
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}
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define void @constraint_J() nounwind {
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; Now J with 0
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; ALL-LABEL: constraint_J:
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; ALL: #APP
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; ALL: addiu ${{[0-9]+}}, ${{[0-9]+}}, 0
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; ALL: #NO_APP
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tail call i32 asm sideeffect "addiu $0, $1, $2\0A\09 ", "=r,r,J"(i32 7, i16 0) nounwind
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ret void
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}
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define void @constraint_K() nounwind {
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; Now K with 64
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; ALL: #APP
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; GAS: addu ${{[0-9]+}}, ${{[0-9]+}}, 64
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; ALL: #NO_APP
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tail call i16 asm sideeffect "addu $0, $1, $2\0A\09 ", "=r,r,K"(i16 7, i16 64) nounwind
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ret void
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}
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define void @constraint_L() nounwind {
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; Now L with 0x00100000
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; ALL: #APP
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; ALL: add ${{[0-9]+}}, ${{[0-9]+}}, ${{[0-9]+}}
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; ALL: #NO_APP
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tail call i32 asm sideeffect "add $0, $1, $3\0A\09", "=r,r,L,r"(i32 7, i32 1048576, i32 0) nounwind
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ret void
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}
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define void @constraint_N() nounwind {
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; Now N with -3
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; ALL: #APP
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; ALL: addiu ${{[0-9]+}}, ${{[0-9]+}}, -3
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; ALL: #NO_APP
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tail call i32 asm sideeffect "addiu $0, $1, $2", "=r,r,N"(i32 7, i32 -3) nounwind
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ret void
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}
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define void @constraint_O() nounwind {
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; Now O with -3
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; ALL: #APP
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; ALL: addiu ${{[0-9]+}}, ${{[0-9]+}}, -3
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; ALL: #NO_APP
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tail call i32 asm sideeffect "addiu $0, $1, $2", "=r,r,O"(i32 7, i16 -3) nounwind
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ret void
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}
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define void @constraint_P() nounwind {
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; Now P with 65535
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; ALL: #APP
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; GAS: addiu ${{[0-9]+}}, ${{[0-9]+}}, 65535
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; ALL: #NO_APP
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tail call i32 asm sideeffect "addiu $0, $1, $2", "=r,r,P"(i32 7, i32 65535) nounwind
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ret void
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}
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