Evan Cheng 28aa6c41d1 In some rare cases, the register allocator can spill registers but end up not utilizing registers at all. The fundamental problem is linearscan's backtracking can end up freeing more than one allocated registers. However, reloads and restores might be folded into uses / defs and freed registers might not be used at all. ... VirtRegMap keeps track of allocations so it knows what's not used. As a horrible hack, the stack coloring can color spill slots with *free* registers. That is, it replace reload and spills with copies from and to the free register. It unfold instructions that load and store the spill slot and replace them with register using variants. Not yet enabled. This is part 1. More coming. llvm-svn: 70787		2009-05-03 18:32:42 +00:00
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DarwinTargetAsmInfo.h	Tidy up #includes, deleting a bunch of unnecessary #includes.	2009-01-05 17:59:02 +00:00
ELFTargetAsmInfo.h	Do not propagate ELF-specific stuff (data.rel) into other targets. This simplifies code and also ensures correctness.	2009-03-30 15:27:43 +00:00
SubtargetFeature.h
Target.td	Rename COPY_TO_SUBCLASS to COPY_TO_REGCLASS, and generalize	2009-04-13 21:06:25 +00:00
TargetAsmInfo.h	Add directive to declare external globals.	2009-04-29 08:23:18 +00:00
TargetCallingConv.td	Use CallConvLower.h and TableGen descriptions of the calling conventions	2009-04-17 19:07:39 +00:00
TargetData.h	Eliminate several more unnecessary intptr_t casts.	2009-02-18 05:09:16 +00:00
TargetELFWriterInfo.h	Tidy up #includes, deleting a bunch of unnecessary #includes.	2009-01-05 17:59:02 +00:00
TargetFrameInfo.h	Tidy up #includes, deleting a bunch of unnecessary #includes.	2009-01-05 17:59:02 +00:00
TargetInstrDesc.h	Add new TargetInstrDesc::hasImplicitUseOfPhysReg and	2009-04-12 07:26:51 +00:00
TargetInstrInfo.h	In some rare cases, the register allocator can spill registers but end up not utilizing registers at all. The fundamental problem is linearscan's backtracking can end up freeing more than one allocated registers. However, reloads and restores might be folded into uses / defs and freed registers might not be used at all.	2009-05-03 18:32:42 +00:00
TargetInstrItineraries.h	Implement ComputeLatency for MachineInstr ScheduleDAGs. Factor	2008-11-21 00:12:10 +00:00
TargetIntrinsicInfo.h	Added support to have TableGen provide information if an intrinsic (core	2009-02-24 23:17:49 +00:00
TargetJITInfo.h	Fix doxygen comment syntax.	2009-04-15 01:44:07 +00:00
TargetLowering.h	Implement review feedback for vector shuffle work.	2009-04-29 05:20:52 +00:00
TargetMachine.h	Remove unused flags.	2009-04-30 00:57:51 +00:00
TargetMachineRegistry.h	Registry.h should not depend on CommandLine.h.	2009-01-16 07:02:28 +00:00
TargetMachOWriterInfo.h
TargetOptions.h	Correct comment.	2009-04-29 00:09:22 +00:00
TargetRegisterInfo.h	In some rare cases, the register allocator can spill registers but end up not utilizing registers at all. The fundamental problem is linearscan's backtracking can end up freeing more than one allocated registers. However, reloads and restores might be folded into uses / defs and freed registers might not be used at all.	2009-05-03 18:32:42 +00:00
TargetSchedule.td	Move target independent td files from lib/Target/ to include/llvm/Target so they can be distributed along with the header files.	2008-11-24 07:34:46 +00:00
TargetSelectionDAG.td	2nd attempt, fixing SSE4.1 issues and implementing feedback from duncan.	2009-04-27 18:41:29 +00:00
TargetSubtarget.h	Add initial support for back-scheduling address computations,	2008-12-16 03:35:01 +00:00