mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-11-22 10:42:39 +01:00
38b8e95596
Summary:
Now that with D65143/D65144 we've produce `@llvm.umul.with.overflow`,
and with D65147 we've flattened the CFG, we now can see that
the guard may have been there to prevent division by zero is redundant.
We can simply drop it:
```
----------------------------------------
Name: no overflow and not zero
%iszero = icmp ne i4 %y, 0
%umul = umul_overflow i4 %x, %y
%umul.ov = extractvalue {i4, i1} %umul, 1
%retval.0 = and i1 %iszero, %umul.ov
ret i1 %retval.0
=>
%iszero = icmp ne i4 %y, 0
%umul = umul_overflow i4 %x, %y
%umul.ov = extractvalue {i4, i1} %umul, 1
%retval.0 = and i1 %iszero, %umul.ov
ret %umul.ov
Done: 1
Optimization is correct!
```
Reviewers: nikic, spatel, xbolva00
Reviewed By: spatel
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D65150
llvm-svn: 370350
91 lines
3.6 KiB
LLVM
91 lines
3.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
|
|
; RUN: opt %s -instsimplify -S | FileCheck %s
|
|
|
|
declare { i4, i1 } @llvm.smul.with.overflow.i4(i4, i4) #1
|
|
|
|
define i1 @t0_smul(i4 %size, i4 %nmemb) {
|
|
; CHECK-LABEL: @t0_smul(
|
|
; CHECK-NEXT: [[SMUL:%.*]] = tail call { i4, i1 } @llvm.smul.with.overflow.i4(i4 [[SIZE:%.*]], i4 [[NMEMB:%.*]])
|
|
; CHECK-NEXT: [[SMUL_OV:%.*]] = extractvalue { i4, i1 } [[SMUL]], 1
|
|
; CHECK-NEXT: ret i1 [[SMUL_OV]]
|
|
;
|
|
%cmp = icmp ne i4 %size, 0
|
|
%smul = tail call { i4, i1 } @llvm.smul.with.overflow.i4(i4 %size, i4 %nmemb)
|
|
%smul.ov = extractvalue { i4, i1 } %smul, 1
|
|
%and = and i1 %smul.ov, %cmp
|
|
ret i1 %and
|
|
}
|
|
|
|
define i1 @t1_commutative(i4 %size, i4 %nmemb) {
|
|
; CHECK-LABEL: @t1_commutative(
|
|
; CHECK-NEXT: [[SMUL:%.*]] = tail call { i4, i1 } @llvm.smul.with.overflow.i4(i4 [[SIZE:%.*]], i4 [[NMEMB:%.*]])
|
|
; CHECK-NEXT: [[SMUL_OV:%.*]] = extractvalue { i4, i1 } [[SMUL]], 1
|
|
; CHECK-NEXT: ret i1 [[SMUL_OV]]
|
|
;
|
|
%cmp = icmp ne i4 %size, 0
|
|
%smul = tail call { i4, i1 } @llvm.smul.with.overflow.i4(i4 %size, i4 %nmemb)
|
|
%smul.ov = extractvalue { i4, i1 } %smul, 1
|
|
%and = and i1 %cmp, %smul.ov ; swapped
|
|
ret i1 %and
|
|
}
|
|
|
|
define i1 @n2_wrong_size(i4 %size0, i4 %size1, i4 %nmemb) {
|
|
; CHECK-LABEL: @n2_wrong_size(
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i4 [[SIZE1:%.*]], 0
|
|
; CHECK-NEXT: [[SMUL:%.*]] = tail call { i4, i1 } @llvm.smul.with.overflow.i4(i4 [[SIZE0:%.*]], i4 [[NMEMB:%.*]])
|
|
; CHECK-NEXT: [[SMUL_OV:%.*]] = extractvalue { i4, i1 } [[SMUL]], 1
|
|
; CHECK-NEXT: [[AND:%.*]] = and i1 [[SMUL_OV]], [[CMP]]
|
|
; CHECK-NEXT: ret i1 [[AND]]
|
|
;
|
|
%cmp = icmp ne i4 %size1, 0 ; not %size0
|
|
%smul = tail call { i4, i1 } @llvm.smul.with.overflow.i4(i4 %size0, i4 %nmemb)
|
|
%smul.ov = extractvalue { i4, i1 } %smul, 1
|
|
%and = and i1 %smul.ov, %cmp
|
|
ret i1 %and
|
|
}
|
|
|
|
define i1 @n3_wrong_pred(i4 %size, i4 %nmemb) {
|
|
; CHECK-LABEL: @n3_wrong_pred(
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i4 [[SIZE:%.*]], 0
|
|
; CHECK-NEXT: [[SMUL:%.*]] = tail call { i4, i1 } @llvm.smul.with.overflow.i4(i4 [[SIZE]], i4 [[NMEMB:%.*]])
|
|
; CHECK-NEXT: [[SMUL_OV:%.*]] = extractvalue { i4, i1 } [[SMUL]], 1
|
|
; CHECK-NEXT: [[AND:%.*]] = and i1 [[SMUL_OV]], [[CMP]]
|
|
; CHECK-NEXT: ret i1 [[AND]]
|
|
;
|
|
%cmp = icmp eq i4 %size, 0 ; not 'ne'
|
|
%smul = tail call { i4, i1 } @llvm.smul.with.overflow.i4(i4 %size, i4 %nmemb)
|
|
%smul.ov = extractvalue { i4, i1 } %smul, 1
|
|
%and = and i1 %smul.ov, %cmp
|
|
ret i1 %and
|
|
}
|
|
|
|
define i1 @n4_not_and(i4 %size, i4 %nmemb) {
|
|
; CHECK-LABEL: @n4_not_and(
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i4 [[SIZE:%.*]], 0
|
|
; CHECK-NEXT: [[SMUL:%.*]] = tail call { i4, i1 } @llvm.smul.with.overflow.i4(i4 [[SIZE]], i4 [[NMEMB:%.*]])
|
|
; CHECK-NEXT: [[SMUL_OV:%.*]] = extractvalue { i4, i1 } [[SMUL]], 1
|
|
; CHECK-NEXT: [[AND:%.*]] = or i1 [[SMUL_OV]], [[CMP]]
|
|
; CHECK-NEXT: ret i1 [[AND]]
|
|
;
|
|
%cmp = icmp ne i4 %size, 0
|
|
%smul = tail call { i4, i1 } @llvm.smul.with.overflow.i4(i4 %size, i4 %nmemb)
|
|
%smul.ov = extractvalue { i4, i1 } %smul, 1
|
|
%and = or i1 %smul.ov, %cmp ; not 'and'
|
|
ret i1 %and
|
|
}
|
|
|
|
define i1 @n5_not_zero(i4 %size, i4 %nmemb) {
|
|
; CHECK-LABEL: @n5_not_zero(
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i4 [[SIZE:%.*]], 1
|
|
; CHECK-NEXT: [[SMUL:%.*]] = tail call { i4, i1 } @llvm.smul.with.overflow.i4(i4 [[SIZE]], i4 [[NMEMB:%.*]])
|
|
; CHECK-NEXT: [[SMUL_OV:%.*]] = extractvalue { i4, i1 } [[SMUL]], 1
|
|
; CHECK-NEXT: [[AND:%.*]] = and i1 [[SMUL_OV]], [[CMP]]
|
|
; CHECK-NEXT: ret i1 [[AND]]
|
|
;
|
|
%cmp = icmp ne i4 %size, 1 ; should be '0'
|
|
%smul = tail call { i4, i1 } @llvm.smul.with.overflow.i4(i4 %size, i4 %nmemb)
|
|
%smul.ov = extractvalue { i4, i1 } %smul, 1
|
|
%and = and i1 %smul.ov, %cmp
|
|
ret i1 %and
|
|
}
|