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https://github.com/RPCS3/llvm-mirror.git
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cc6967667d
If the branch isn't `unpredictable`, and it is predicted to *not* branch to the block we are considering speculatively executing, then it seems counter-productive to execute the code that is predicted not to be executed. Reviewed By: spatel Differential Revision: https://reviews.llvm.org/D106650
261 lines
8.4 KiB
LLVM
261 lines
8.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -S -simplifycfg -simplifycfg-require-and-preserve-domtree=1 -two-entry-phi-node-folding-threshold=0 -phi-node-folding-threshold=4 < %s | FileCheck %s
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declare void @sideeffect0()
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declare void @sideeffect1()
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declare void @sideeffect2()
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define i32 @unknown(i1 %c, i32 %a, i32 %b) {
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; CHECK-LABEL: @unknown(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: call void @sideeffect0()
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; CHECK-NEXT: br i1 [[C:%.*]], label [[DISPATCH:%.*]], label [[END:%.*]]
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; CHECK: dispatch:
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; CHECK-NEXT: call void @sideeffect1()
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[A:%.*]], [[B:%.*]]
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; CHECK-NEXT: [[VAL:%.*]] = add i32 [[A]], [[B]]
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; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[CMP]], i32 [[VAL]], i32 0
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; CHECK-NEXT: br label [[END]]
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; CHECK: end:
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; CHECK-NEXT: [[RES:%.*]] = phi i32 [ -1, [[ENTRY:%.*]] ], [ [[SPEC_SELECT]], [[DISPATCH]] ]
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; CHECK-NEXT: call void @sideeffect2()
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; CHECK-NEXT: ret i32 [[RES]]
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;
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entry:
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call void @sideeffect0()
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br i1 %c, label %dispatch, label %end
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dispatch:
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call void @sideeffect1()
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%cmp = icmp eq i32 %a, %b
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br i1 %cmp, label %cond.true, label %end
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cond.true:
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%val = add i32 %a, %b
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br label %end
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end:
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%res = phi i32 [ -1, %entry ], [ 0, %dispatch ], [ %val, %cond.true ]
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call void @sideeffect2()
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ret i32 %res
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}
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define i32 @predictably_taken(i1 %c, i32 %a, i32 %b) {
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; CHECK-LABEL: @predictably_taken(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: call void @sideeffect0()
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; CHECK-NEXT: br i1 [[C:%.*]], label [[DISPATCH:%.*]], label [[END:%.*]]
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; CHECK: dispatch:
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; CHECK-NEXT: call void @sideeffect1()
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[A:%.*]], [[B:%.*]]
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; CHECK-NEXT: [[VAL:%.*]] = add i32 [[A]], [[B]]
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; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[CMP]], i32 [[VAL]], i32 0, !prof [[PROF0:![0-9]+]]
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; CHECK-NEXT: br label [[END]]
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; CHECK: end:
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; CHECK-NEXT: [[RES:%.*]] = phi i32 [ -1, [[ENTRY:%.*]] ], [ [[SPEC_SELECT]], [[DISPATCH]] ]
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; CHECK-NEXT: call void @sideeffect2()
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; CHECK-NEXT: ret i32 [[RES]]
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;
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entry:
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call void @sideeffect0()
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br i1 %c, label %dispatch, label %end
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dispatch:
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call void @sideeffect1()
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%cmp = icmp eq i32 %a, %b
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br i1 %cmp, label %cond.true, label %end, !prof !0 ; likely branches to %cond.true
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cond.true:
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%val = add i32 %a, %b
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br label %end
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end:
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%res = phi i32 [ -1, %entry ], [ 0, %dispatch ], [ %val, %cond.true ]
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call void @sideeffect2()
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ret i32 %res
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}
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define i32 @predictably_nontaken(i1 %c, i32 %a, i32 %b) {
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; CHECK-LABEL: @predictably_nontaken(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: call void @sideeffect0()
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; CHECK-NEXT: br i1 [[C:%.*]], label [[DISPATCH:%.*]], label [[END:%.*]]
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; CHECK: dispatch:
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; CHECK-NEXT: call void @sideeffect1()
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[A:%.*]], [[B:%.*]]
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; CHECK-NEXT: br i1 [[CMP]], label [[END]], label [[COND_TRUE:%.*]], !prof [[PROF0]]
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; CHECK: cond.true:
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; CHECK-NEXT: [[VAL:%.*]] = add i32 [[A]], [[B]]
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; CHECK-NEXT: br label [[END]]
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; CHECK: end:
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; CHECK-NEXT: [[RES:%.*]] = phi i32 [ -1, [[ENTRY:%.*]] ], [ 0, [[DISPATCH]] ], [ [[VAL]], [[COND_TRUE]] ]
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; CHECK-NEXT: call void @sideeffect2()
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; CHECK-NEXT: ret i32 [[RES]]
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;
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entry:
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call void @sideeffect0()
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br i1 %c, label %dispatch, label %end
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dispatch:
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call void @sideeffect1()
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%cmp = icmp eq i32 %a, %b
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br i1 %cmp, label %end, label %cond.true, !prof !0 ; likely branches to %end
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cond.true:
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%val = add i32 %a, %b
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br label %end
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end:
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%res = phi i32 [ -1, %entry ], [ 0, %dispatch ], [ %val, %cond.true ]
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call void @sideeffect2()
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ret i32 %res
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}
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define i32 @almost_predictably_nontaken(i1 %c, i32 %a, i32 %b) {
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; CHECK-LABEL: @almost_predictably_nontaken(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: call void @sideeffect0()
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; CHECK-NEXT: br i1 [[C:%.*]], label [[DISPATCH:%.*]], label [[END:%.*]]
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; CHECK: dispatch:
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; CHECK-NEXT: call void @sideeffect1()
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[A:%.*]], [[B:%.*]]
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; CHECK-NEXT: [[VAL:%.*]] = add i32 [[A]], [[B]]
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; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[CMP]], i32 0, i32 [[VAL]], !prof [[PROF1:![0-9]+]]
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; CHECK-NEXT: br label [[END]]
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; CHECK: end:
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; CHECK-NEXT: [[RES:%.*]] = phi i32 [ -1, [[ENTRY:%.*]] ], [ [[SPEC_SELECT]], [[DISPATCH]] ]
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; CHECK-NEXT: call void @sideeffect2()
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; CHECK-NEXT: ret i32 [[RES]]
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;
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entry:
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call void @sideeffect0()
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br i1 %c, label %dispatch, label %end
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dispatch:
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call void @sideeffect1()
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%cmp = icmp eq i32 %a, %b
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br i1 %cmp, label %end, label %cond.true, !prof !1 ; almost likely branches to %end
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cond.true:
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%val = add i32 %a, %b
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br label %end
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end:
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%res = phi i32 [ -1, %entry ], [ 0, %dispatch ], [ %val, %cond.true ]
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call void @sideeffect2()
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ret i32 %res
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}
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define i32 @unpredictable(i1 %c, i32 %a, i32 %b) {
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; CHECK-LABEL: @unpredictable(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: call void @sideeffect0()
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; CHECK-NEXT: br i1 [[C:%.*]], label [[DISPATCH:%.*]], label [[END:%.*]]
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; CHECK: dispatch:
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; CHECK-NEXT: call void @sideeffect1()
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[A:%.*]], [[B:%.*]]
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; CHECK-NEXT: [[VAL:%.*]] = add i32 [[A]], [[B]]
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; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[CMP]], i32 [[VAL]], i32 0, !unpredictable !2
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; CHECK-NEXT: br label [[END]]
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; CHECK: end:
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; CHECK-NEXT: [[RES:%.*]] = phi i32 [ -1, [[ENTRY:%.*]] ], [ [[SPEC_SELECT]], [[DISPATCH]] ]
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; CHECK-NEXT: call void @sideeffect2()
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; CHECK-NEXT: ret i32 [[RES]]
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;
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entry:
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call void @sideeffect0()
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br i1 %c, label %dispatch, label %end
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dispatch:
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call void @sideeffect1()
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%cmp = icmp eq i32 %a, %b
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br i1 %cmp, label %cond.true, label %end, !unpredictable !2 ; unpredictable
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cond.true:
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%val = add i32 %a, %b
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br label %end
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end:
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%res = phi i32 [ -1, %entry ], [ 0, %dispatch ], [ %val, %cond.true ]
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call void @sideeffect2()
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ret i32 %res
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}
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define i32 @unpredictable_yet_taken(i1 %c, i32 %a, i32 %b) {
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; CHECK-LABEL: @unpredictable_yet_taken(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: call void @sideeffect0()
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; CHECK-NEXT: br i1 [[C:%.*]], label [[DISPATCH:%.*]], label [[END:%.*]]
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; CHECK: dispatch:
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; CHECK-NEXT: call void @sideeffect1()
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[A:%.*]], [[B:%.*]]
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; CHECK-NEXT: [[VAL:%.*]] = add i32 [[A]], [[B]]
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; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[CMP]], i32 [[VAL]], i32 0, !prof [[PROF0]], !unpredictable !2
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; CHECK-NEXT: br label [[END]]
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; CHECK: end:
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; CHECK-NEXT: [[RES:%.*]] = phi i32 [ -1, [[ENTRY:%.*]] ], [ [[SPEC_SELECT]], [[DISPATCH]] ]
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; CHECK-NEXT: call void @sideeffect2()
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; CHECK-NEXT: ret i32 [[RES]]
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;
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entry:
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call void @sideeffect0()
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br i1 %c, label %dispatch, label %end
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dispatch:
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call void @sideeffect1()
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%cmp = icmp eq i32 %a, %b
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br i1 %cmp, label %cond.true, label %end, !prof !0, !unpredictable !2 ; likely branches to %cond.true, yet unpredictable
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cond.true:
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%val = add i32 %a, %b
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br label %end
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end:
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%res = phi i32 [ -1, %entry ], [ 0, %dispatch ], [ %val, %cond.true ]
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call void @sideeffect2()
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ret i32 %res
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}
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define i32 @unpredictable_yet_nontaken(i1 %c, i32 %a, i32 %b) {
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; CHECK-LABEL: @unpredictable_yet_nontaken(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: call void @sideeffect0()
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; CHECK-NEXT: br i1 [[C:%.*]], label [[DISPATCH:%.*]], label [[END:%.*]]
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; CHECK: dispatch:
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; CHECK-NEXT: call void @sideeffect1()
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[A:%.*]], [[B:%.*]]
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; CHECK-NEXT: [[VAL:%.*]] = add i32 [[A]], [[B]]
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; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[CMP]], i32 0, i32 [[VAL]], !prof [[PROF0]], !unpredictable !2
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; CHECK-NEXT: br label [[END]]
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; CHECK: end:
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; CHECK-NEXT: [[RES:%.*]] = phi i32 [ -1, [[ENTRY:%.*]] ], [ [[SPEC_SELECT]], [[DISPATCH]] ]
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; CHECK-NEXT: call void @sideeffect2()
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; CHECK-NEXT: ret i32 [[RES]]
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;
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entry:
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call void @sideeffect0()
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br i1 %c, label %dispatch, label %end
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dispatch:
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call void @sideeffect1()
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%cmp = icmp eq i32 %a, %b
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br i1 %cmp, label %end, label %cond.true, !prof !0, !unpredictable !2 ; likely branches to %end, yet unpredictable
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cond.true:
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%val = add i32 %a, %b
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br label %end
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end:
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%res = phi i32 [ -1, %entry ], [ 0, %dispatch ], [ %val, %cond.true ]
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call void @sideeffect2()
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ret i32 %res
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}
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!0 = !{!"branch_weights", i32 99, i32 1}
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!1 = !{!"branch_weights", i32 70, i32 1}
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!2 = !{}
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; CHECK: !0 = !{!"branch_weights", i32 99, i32 1}
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; CHECK: !1 = !{!"branch_weights", i32 70, i32 1}
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; CHECK: !2 = !{}
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