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than on MipsSubtargetInfo. This required a bit of massaging in the MC level to handle this since MC is a) largely a collection of disparate classes with no hierarchy, and b) there's no overarching equivalent to the TargetMachine, instead only the subtarget via MCSubtargetInfo (which is the base class of TargetSubtargetInfo). We're now storing the ABI in both the TargetMachine level and in the MC level because the AsmParser and the TargetStreamer both need to know what ABI we have to parse assembly and emit objects. The target streamer has a pointer to the one in the asm parser and is updated when the asm parser is created. This is fragile as the FIXME comment notes, but shouldn't be a problem in practice since we always create an asm parser before attempting to emit object code via the assembler. The TargetMachine now contains the ABI so that the DataLayout can be constructed dependent upon ABI. All testcases have been updated to use the -target-abi command line flag so that we can set the ABI without using a subtarget feature. Should be no change visible externally here. llvm-svn: 227102
68 lines
2.2 KiB
C++
68 lines
2.2 KiB
C++
//===---- MipsABIInfo.h - Information about MIPS ABI's --------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_MIPS_MCTARGETDESC_MIPSABIINFO_H
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#define LLVM_LIB_TARGET_MIPS_MCTARGETDESC_MIPSABIINFO_H
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#include "llvm/ADT/ArrayRef.h"
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#include "llvm/ADT/Triple.h"
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#include "llvm/IR/CallingConv.h"
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#include "llvm/MC/MCRegisterInfo.h"
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namespace llvm {
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class MCTargetOptions;
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class StringRef;
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class MipsABIInfo {
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public:
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enum class ABI { Unknown, O32, N32, N64, EABI };
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protected:
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ABI ThisABI;
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public:
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MipsABIInfo(ABI ThisABI) : ThisABI(ThisABI) {}
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static MipsABIInfo Unknown() { return MipsABIInfo(ABI::Unknown); }
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static MipsABIInfo O32() { return MipsABIInfo(ABI::O32); }
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static MipsABIInfo N32() { return MipsABIInfo(ABI::N32); }
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static MipsABIInfo N64() { return MipsABIInfo(ABI::N64); }
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static MipsABIInfo EABI() { return MipsABIInfo(ABI::EABI); }
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static MipsABIInfo computeTargetABI(Triple TT, StringRef CPU,
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const MCTargetOptions &Options);
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bool IsKnown() const { return ThisABI != ABI::Unknown; }
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bool IsO32() const { return ThisABI == ABI::O32; }
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bool IsN32() const { return ThisABI == ABI::N32; }
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bool IsN64() const { return ThisABI == ABI::N64; }
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bool IsEABI() const { return ThisABI == ABI::EABI; }
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ABI GetEnumValue() const { return ThisABI; }
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/// The registers to use for byval arguments.
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const ArrayRef<MCPhysReg> GetByValArgRegs() const;
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/// The registers to use for the variable argument list.
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const ArrayRef<MCPhysReg> GetVarArgRegs() const;
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/// Obtain the size of the area allocated by the callee for arguments.
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/// CallingConv::FastCall affects the value for O32.
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unsigned GetCalleeAllocdArgSizeInBytes(CallingConv::ID CC) const;
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/// Ordering of ABI's
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/// MipsGenSubtargetInfo.inc will use this to resolve conflicts when given
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/// multiple ABI options.
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bool operator<(const MipsABIInfo Other) const {
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return ThisABI < Other.GetEnumValue();
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}
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};
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}
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#endif
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