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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-24 19:52:54 +01:00
llvm-mirror/test/CodeGen
Bill Wendling 297eb080b6 Revert the "XFAIL" for the rotate_ops.ll testcase. Instead, mark ISD::ROTR
instructions in CellSPU as "Expand" so that they won't be generated. I added a
"FIXME" so that this hack can be addressed and reverted once ISD::ROTR is
supported in the .td files.

llvm-svn: 55582
2008-08-31 02:59:23 +00:00
..
Alpha allow this to pass. 2008-08-29 17:18:26 +00:00
ARM It's not legal to output a GV in a coalesced section if it's used in an ARM PIC relative constantpool. 2008-08-08 06:56:16 +00:00
CBackend In the CBackend, use casts to force integer add, subtract, and 2008-07-18 18:43:12 +00:00
CellSPU Revert the "XFAIL" for the rotate_ops.ll testcase. Instead, mark ISD::ROTR 2008-08-31 02:59:23 +00:00
CPP Put CPPBackend tests into their own directory and run them only if they're 2008-07-10 22:35:32 +00:00
Generic Improve support for vector casts in LLVM IR and CodeGen. 2008-08-14 20:04:46 +00:00
IA64
Mips Support added for ctlz intrinsic, test case added. 2008-08-08 06:16:31 +00:00
PowerPC Testcases for ppc atomics. 2008-08-30 00:54:31 +00:00
SPARC
X86 Re-apply 55467 with fix. If copy is being replaced by remat'ed def, transfer the implicit defs onto the remat'ed instruction. 2008-08-30 09:09:33 +00:00