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https://github.com/RPCS3/llvm-mirror.git
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14a7ad6b92
Summary: The backend has no reason to behave like a driver and should generally do as it's told (and error out if it can't) instead of trying to figure out what the API user meant. The default ABI is still derived from the arch component as a concession to backwards compatibility. API-users that previously passed an explicit CPU and a triple that was inconsistent with the CPU (e.g. mips-linux-gnu and mips64r2) may get a different ABI to what they got before. However, it's expected that there are no such users on the basis that CodeGen has been asserting that the triple is consistent with the selected ABI for several releases. API-users that were consistent or passed '' or 'generic' as the CPU will see no difference. Reviewers: sdardis, rafael Subscribers: rafael, dsanders, sdardis, llvm-commits Differential Revision: http://reviews.llvm.org/D21466 llvm-svn: 273557
207 lines
4.7 KiB
LLVM
207 lines
4.7 KiB
LLVM
; RUN: llc -march=mipsel -mcpu=mips32r6 -relocation-model=static -disable-mips-delay-filler < %s | FileCheck %s -check-prefix=STATIC32
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; RUN: llc -march=mipsel -mcpu=mips64r6 -target-abi n64 -disable-mips-delay-filler < %s | FileCheck %s -check-prefix=PIC
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; Function Attrs: nounwind
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define void @l() {
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entry:
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; PIC: jalrc $25
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%call = tail call i32 @k()
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; PIC: jalrc $25
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%call1 = tail call i32 @j()
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%cmp = icmp eq i32 %call, %call1
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; CHECK: bnec
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br i1 %cmp, label %if.then, label %if.end
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if.then: ; preds = %entry:
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; STATIC: nop
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; STATIC: jal
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; PIC: jalrc $25
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tail call void @f(i32 signext -2)
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br label %if.end
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if.end: ; preds = %if.then, %entry
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; CHECK: jrc $ra
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ret void
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}
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declare i32 @k()
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declare i32 @j()
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declare void @f(i32 signext)
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; Function Attrs: define void @l2() {
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define void @l2() {
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entry:
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; PIC: jalrc $25
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%call = tail call i32 @k()
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; PIC: jalrc $25
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%call1 = tail call i32 @i()
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%cmp = icmp eq i32 %call, %call1
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; CHECK beqc
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br i1 %cmp, label %if.end, label %if.then
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if.then: ; preds = %entry:
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; STATIC: nop
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; STATIC: jal
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; PIC: jalrc $25
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tail call void @f(i32 signext -1)
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br label %if.end
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if.end: ; preds = %entry, %if.then
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; CHECK: jrc $ra
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ret void
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}
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declare i32 @i()
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; Function Attrs: nounwind
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define void @l3() {
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entry:
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; PIC: jalrc $25
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%call = tail call i32 @k()
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%cmp = icmp slt i32 %call, 0
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; CHECK : bgez
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br i1 %cmp, label %if.then, label %if.end
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if.then: ; preds = %entry:
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; STATIC: nop
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; STATIC: jal
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; PIC: jalrc $25
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tail call void @f(i32 signext 0)
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br label %if.end
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if.end: ; preds = %if.then, %entry
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; CHECK: jrc $ra
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ret void
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}
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; Function Attrs: nounwind
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define void @l4() {
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entry:
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%call = tail call i32 @k()
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%cmp = icmp slt i32 %call, 1
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; CHECK: bgtzc
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br i1 %cmp, label %if.then, label %if.end
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if.then: ; preds = %entry:
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; STATIC: nop
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; STATIC: jal
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tail call void @f(i32 signext 1)
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br label %if.end
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if.end: ; preds = %if.then, %entry
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; CHECK: jrc $ra
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ret void
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}
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; Function Attrs: nounwind
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define void @l5() {
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entry:
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; PIC: jalrc $25
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%call = tail call i32 @k()
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; PIC: jalrc $25
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%cmp = icmp sgt i32 %call, 0
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; CHECK: blezc
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br i1 %cmp, label %if.then, label %if.end
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if.then: ; preds = %entry:
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; STATIC: nop
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; STATIC: jal
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; PIC: jalrc $25
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tail call void @f(i32 signext 2)
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br label %if.end
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if.end: ; preds = %if.then, %entry
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; CHECK: jrc $ra
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ret void
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}
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; Function Attrs: nounwind
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define void @l6() {
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entry:
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; PIC: jalrc $25
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%call = tail call i32 @k()
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; PIC: jalrc $25
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%cmp = icmp sgt i32 %call, -1
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; CHECK: bltzc
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br i1 %cmp, label %if.then, label %if.end
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if.then: ; preds = %entry:
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; STATIC: nop
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; STATIC: jal
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; PIC: jalrc $25
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tail call void @f(i32 signext 3)
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br label %if.end
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if.end: ; preds = %if.then, %entry
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; CHECK: jrc $ra
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ret void
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}
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; Function Attrs: nounwind
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define void @l7() {
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entry:
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; PIC: jalrc $25
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%call = tail call i32 @k()
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%cmp = icmp eq i32 %call, 0
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; CHECK: bnezc
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br i1 %cmp, label %if.then, label %if.end
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if.then: ; preds = %entry:
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; STATIC: nop
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; STATIC: jal
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; PIC: jalrc $25
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tail call void @f(i32 signext 4)
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br label %if.end
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if.end: ; preds = %if.then, %entry
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; CHECK: jrc $ra
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ret void
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}
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; Function Attrs: nounwind
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define void @l8() {
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entry:
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; PIC: jalrc $25
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%call = tail call i32 @k()
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%cmp = icmp eq i32 %call, 0
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; CHECK: beqzc
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br i1 %cmp, label %if.end, label %if.then
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if.then: ; preds = %entry:
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; STATIC: nop
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; STATIC: jal
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; PIC: jalrc $25
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tail call void @f(i32 signext 5)
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br label %if.end
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if.end: ; preds = %entry, %if.then
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; CHECK: jrc $ra
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ret void
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}
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define i32 @l9(i8* ()* %i) #0 {
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entry:
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%i.addr = alloca i8* ()*, align 4
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store i8* ()* %i, i8* ()** %i.addr, align 4
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; STATIC32: jal
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; STATIC32: nop
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; PIC: jalrc $25
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%call = call i32 @k()
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; PIC: jalrc $25
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%cmp = icmp ne i32 %call, 0
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; CHECK: beqzc
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br i1 %cmp, label %if.then, label %if.end
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if.then: ; preds = %entry
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%0 = load i8* ()*, i8* ()** %i.addr, align 4
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; CHECK: jalrc $25
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%call1 = call i8* %0()
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br label %if.end
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if.end: ; preds = %if.then, %entry
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; CHECK: jrc $ra
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ret i32 -1
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}
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