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llvm-mirror/test/CodeGen
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Jatin Bhateja 856f7f79e2 [X86] PR32755 : Improvement in CodeGen instruction selection for LEAs. 
Summary:
   1/  Operand folding during complex pattern matching for LEAs has been
       extended, such that it promotes Scale to accommodate similar operand
       appearing in the DAG.
       e.g.
          T1 = A + B
          T2 = T1 + 10
          T3 = T2 + A
       For above DAG rooted at T3, X86AddressMode will no look like
          Base = B , Index = A , Scale = 2 , Disp = 10

   2/  During OptimizeLEAPass down the pipeline factorization is now performed over LEAs
       so that if there is an opportunity then complex LEAs (having 3 operands)
       could be factored out.
       e.g.
          leal 1(%rax,%rcx,1), %rdx
          leal 1(%rax,%rcx,2), %rcx
       will be factored as following
          leal 1(%rax,%rcx,1), %rdx
          leal (%rdx,%rcx)   , %edx

   3/ Aggressive operand folding for AM based selection for LEAs is sensitive to loops,
      thus avoiding creation of any complex LEAs within a loop.

Reviewers: lsaba, RKSimon, craig.topper, qcolombet

Reviewed By: lsaba

Subscribers: spatel, igorb, llvm-commits

Differential Revision: https://reviews.llvm.org/D35014

llvm-svn: 313343
2017-09-15 05:29:51 +00:00
..
AArch64 Revert r312719 "[MachineCombiner] Update instruction depths incrementally for large BBs." 2017-09-13 23:23:09 +00:00
AMDGPU AMDGPU: Fix violating constant bus restriction 2017-09-14 20:54:29 +00:00
ARC
ARM Add newline to end of test file. NFC. 2017-09-14 14:48:59 +00:00
AVR [AVR] Enable the '__do_copy_data' function 2017-09-11 10:32:51 +00:00
BPF bpf: add " ll" in the LD_IMM64 asmstring 2017-09-11 23:43:35 +00:00
Generic [MIParser] Ensure getHexUint doesn't produce APInts with a bitwidth of 0 2017-09-01 22:17:14 +00:00
Hexagon [IfConversion] More simple, correct dead/kill liveness handling 2017-09-14 15:53:11 +00:00
Inputs
Lanai
Mips [mips] Pick the right variant of DINS upfront and enable target instruction verification 2017-09-14 10:58:00 +00:00
MIR AMDGPU: Handle non-temporal loads and stores 2017-09-07 17:14:54 +00:00
MSP430
Nios2
NVPTX [CUDA] Added rudimentary support for CUDA-9 and sm_70. 2017-09-07 18:14:32 +00:00
PowerPC [XRay][CodeGen] Use the current function symbol as the associated symbol for the instrumentation map 2017-09-14 07:08:23 +00:00
SPARC Revert "Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding"" 2017-09-04 15:47:00 +00:00
SystemZ Move llvm/test/CodeGen/X86/clear-liverange-spillreg.mir to SystemZ. It was in wrong place. 2017-09-14 00:03:23 +00:00
Thumb Revert "Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding"" 2017-09-04 15:47:00 +00:00
Thumb2
WebAssembly [WebAssembly] Add sign extend instructions from atomics proposal 2017-09-13 00:29:06 +00:00
WinEH
X86 [X86] PR32755 : Improvement in CodeGen instruction selection for LEAs. 2017-09-15 05:29:51 +00:00
XCore