mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-10-19 19:12:56 +02:00
e236141513
Summary: This is a follow-up to r335942. - Merge SISubtarget into AMDGPUSubtarget and rename to GCNSubtarget - Rename AMDGPUCommonSubtarget to AMDGPUSubtarget - Merge R600Subtarget::Generation and GCNSubtarget::Generation into AMDGPUSubtarget::Generation. Reviewers: arsenm, jvesely Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, javed.absar, llvm-commits Differential Revision: https://reviews.llvm.org/D49037 llvm-svn: 336851
22 lines
755 B
TableGen
22 lines
755 B
TableGen
//===-- R700Instructions.td - R700 Instruction defs -------*- tablegen -*-===//
|
|
//
|
|
// The LLVM Compiler Infrastructure
|
|
//
|
|
// This file is distributed under the University of Illinois Open Source
|
|
// License. See LICENSE.TXT for details.
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
//
|
|
// TableGen definitions for instructions which are:
|
|
// - Available to R700 and newer VLIW4/VLIW5 GPUs
|
|
// - Available only on R700 family GPUs.
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
def isR700 : Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::R700">;
|
|
|
|
let Predicates = [isR700] in {
|
|
def SIN_r700 : SIN_Common<0x6E>;
|
|
def COS_r700 : COS_Common<0x6F>;
|
|
}
|