Chandler Carruth 2a5f3cfadc [SROA] Fix another instability in SROA with respect to the slice ... ordering. The fundamental problem that we're hitting here is that the use-def chain ordering is *itself* not a stable thing to be relying on in the rewriting for SROA. Further, we use a non-stable sort over the slices to arrange them based on the section of the alloca they're operating on. With a debugging STL implementation (or different implementations in stage2 and stage3) this can cause stage2 != stage3. The specific aspect of this problem fixed in this commit deals with the rewriting and load-speculation around PHIs and Selects. This, like many other aspects of the use-rewriting in SROA, is really part of the "strong SSA-formation" that is doen by SROA where it works very hard to canonicalize loads and stores in *just* the right way to satisfy the needs of mem2reg[1]. When we have a select (or a PHI) with 2 uses of the same alloca, we test that loads downstream of the select are speculatable around it twice. If only one of the operands to the select needs to be rewritten, then if we get lucky we rewrite that one first and the select is immediately speculatable. This can cause the order of operand visitation, and thus the order of slices to be rewritten, to change an alloca from promotable to non-promotable and vice versa. The fix is to defer all of the speculation until *after* the rewrite phase is done. Once we've rewritten everything, we can accurately test for whether speculation will work (once, instead of twice!) and the order ceases to matter. This also happens to simplify the other subtlety of speculation -- we need to *not* speculate anything unless the result of speculating will make the alloca fully promotable by mem2reg. I had a previous attempt at simplifying this, but it was still pretty horrible. There is actually already a *really* nice test case for this in basictest.ll, but on multiple STL implementations and inputs, we just got "lucky". Fortunately, the test case is very small and we can essentially build it in exactly the opposite way to get reasonable coverage in both directions even from normal STL implementations. llvm-svn: 202092		2014-02-25 00:07:09 +00:00
..
Analysis	add -da-delinearize runs and checks to MIV testcases	2014-02-21 18:15:18 +00:00
Assembler
Bindings
Bitcode	Update testing case for r200806.	2014-02-04 23:53:12 +00:00
BugPoint
CodeGen	R600/SI - Add new CI arithmetic instructions.	2014-02-24 21:01:28 +00:00
DebugInfo	llvm-dwarfdump: Support for debug_line.dwo section for file names for type units under fission.	2014-02-24 23:58:54 +00:00
ExecutionEngine	PC-rel implemented in AArch64, test now pass	2014-02-12 17:17:41 +00:00
Feature	Disable most IR-level transform passes on functions marked 'optnone'.	2014-02-06 00:07:05 +00:00
FileCheck
Instrumentation	[asan] remove test that should have been removed in r202033	2014-02-24 13:44:24 +00:00
Integer
JitListener
Linker	Copy dll storage in copyAttributes.	2014-02-13 05:11:35 +00:00
LTO	Add back r201608, r201622, r201624 and r201625	2014-02-19 17:23:20 +00:00
MC	Asm Parser: support .error directive	2014-02-23 23:02:23 +00:00
Object	Add a SymbolicFile interface between Binary and ObjectFile.	2014-02-21 20:10:59 +00:00
Other
TableGen
tools	llvm-objdump: Do not attempt to disassemble symbols outside of section	2014-02-24 22:12:11 +00:00
Transforms	[SROA] Fix another instability in SROA with respect to the slice	2014-02-25 00:07:09 +00:00
Unit
Verifier
YAMLParser
.clang-format
CMakeLists.txt	[CMake] Remove dependency on non-existing profile_rt-shared. Patch by Brad King.	2014-02-24 15:07:06 +00:00
lit.cfg	PGO: llvm-profdata: tool for merging profiles	2014-02-17 23:22:49 +00:00
lit.site.cfg.in
Makefile
Makefile.tests
TestRunner.sh