Matt Arsenault 5f7fab5b1a AMDGPU: Fix name for v_ashrrev_i16 ... llvm-svn: 289967		2016-12-16 17:40:11 +00:00
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AArch64	[Assembler] Better error messages for .org directive	2016-12-14 10:43:58 +00:00
AMDGPU	AMDGPU: Fix name for v_ashrrev_i16	2016-12-16 17:40:11 +00:00
ARM	[Assembler] Better error messages for .org directive	2016-12-14 10:43:58 +00:00
AsmParser	[Assembler] Better error messages for .org directive	2016-12-14 10:43:58 +00:00
AVR	[AVR] Add all of the machine code test suite	2016-11-09 23:46:25 +00:00
COFF	Emit S_COMPILE3 record once per TU rather than once per function	2016-11-02 21:30:35 +00:00
Disassembler	AMDGPU: Fix name for v_ashrrev_i16	2016-12-16 17:40:11 +00:00
ELF	Speculatively revert r289925, see PR31407	2016-12-16 14:02:28 +00:00
Hexagon	[Hexagon] Fix disassembler crash after r279255	2016-09-09 21:45:00 +00:00
Lanai	[lanai] Add more tests for assembly of conditional ALU ops	2016-07-11 17:58:16 +00:00
MachO	Speculatively revert r289925, see PR31407	2016-12-16 14:02:28 +00:00
Markup
Mips	[mips] For PIC code convert unconditional jump to unconditional branch	2016-12-12 17:40:26 +00:00
PowerPC	[PPC] Slightly Improve Assembly Parsing errors and add EOL comment	2016-12-05 14:11:03 +00:00
Sparc
SystemZ	[SystemZ] Support remaining atomic instructions	2016-12-02 18:24:16 +00:00
X86	[LMT] Restrict nop length to one	2016-12-01 15:19:10 +00:00