mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-11-23 11:13:28 +01:00
11fab31200
Due to an erratum in some versions of LEON, we must insert a NOP after any LD or LDF instruction to ensure the processor has time to load the value correctly before using it. This pass will implement that erratum fix. The code will have no effect for other Sparc, but non-LEON processors. Differential Review: http://reviews.llvm.org/D20353 llvm-svn: 270417
35 lines
1.1 KiB
CMake
35 lines
1.1 KiB
CMake
set(LLVM_TARGET_DEFINITIONS Sparc.td)
|
|
|
|
tablegen(LLVM SparcGenRegisterInfo.inc -gen-register-info)
|
|
tablegen(LLVM SparcGenInstrInfo.inc -gen-instr-info)
|
|
tablegen(LLVM SparcGenDisassemblerTables.inc -gen-disassembler)
|
|
tablegen(LLVM SparcGenMCCodeEmitter.inc -gen-emitter)
|
|
tablegen(LLVM SparcGenAsmWriter.inc -gen-asm-writer)
|
|
tablegen(LLVM SparcGenAsmMatcher.inc -gen-asm-matcher)
|
|
tablegen(LLVM SparcGenDAGISel.inc -gen-dag-isel)
|
|
tablegen(LLVM SparcGenSubtargetInfo.inc -gen-subtarget)
|
|
tablegen(LLVM SparcGenCallingConv.inc -gen-callingconv)
|
|
add_public_tablegen_target(SparcCommonTableGen)
|
|
|
|
add_llvm_target(SparcCodeGen
|
|
DelaySlotFiller.cpp
|
|
LeonPasses.cpp
|
|
SparcAsmPrinter.cpp
|
|
SparcInstrInfo.cpp
|
|
SparcISelDAGToDAG.cpp
|
|
SparcISelLowering.cpp
|
|
SparcFrameLowering.cpp
|
|
SparcMachineFunctionInfo.cpp
|
|
SparcRegisterInfo.cpp
|
|
SparcSubtarget.cpp
|
|
SparcTargetMachine.cpp
|
|
SparcMCInstLower.cpp
|
|
SparcTargetObjectFile.cpp
|
|
)
|
|
|
|
add_subdirectory(TargetInfo)
|
|
add_subdirectory(MCTargetDesc)
|
|
add_subdirectory(InstPrinter)
|
|
add_subdirectory(AsmParser)
|
|
add_subdirectory(Disassembler)
|