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342e72a308
This is equivalent to the AMDGPUTargetMachine now, but it is the starting point for separating R600 and GCN functionality into separate targets. It is recommened that users start using the gcn triple for GCN-based GPUs, because using the r600 triple for these GPUs will be deprecated in the future. llvm-svn: 225277
41 lines
1.9 KiB
LLVM
41 lines
1.9 KiB
LLVM
;RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck %s
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; Example of a simple geometry shader loading vertex attributes from the
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; ESGS ring buffer
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; CHECK-LABEL: {{^}}main:
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; CHECK: buffer_load_dword
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; CHECK: buffer_load_dword
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; CHECK: buffer_load_dword
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; CHECK: buffer_load_dword
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define void @main([17 x <16 x i8>] addrspace(2)* byval, [32 x <16 x i8>] addrspace(2)* byval, [16 x <32 x i8>] addrspace(2)* byval, [2 x <16 x i8>] addrspace(2)* byval, [17 x <16 x i8>] addrspace(2)* inreg, [17 x <16 x i8>] addrspace(2)* inreg, i32, i32, i32, i32) #0 {
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main_body:
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%10 = getelementptr [2 x <16 x i8>] addrspace(2)* %3, i64 0, i32 1
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%11 = load <16 x i8> addrspace(2)* %10, !tbaa !0
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%12 = shl i32 %6, 2
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%13 = call i32 @llvm.SI.buffer.load.dword.i32.i32(<16 x i8> %11, i32 0, i32 0, i32 0, i32 0, i32 0, i32 1, i32 1, i32 0)
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%14 = bitcast i32 %13 to float
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%15 = call i32 @llvm.SI.buffer.load.dword.i32.i32(<16 x i8> %11, i32 %12, i32 0, i32 0, i32 1, i32 0, i32 1, i32 1, i32 0)
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%16 = bitcast i32 %15 to float
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%17 = call i32 @llvm.SI.buffer.load.dword.i32.i32(<16 x i8> %11, i32 %12, i32 0, i32 0, i32 0, i32 1, i32 1, i32 1, i32 0)
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%18 = bitcast i32 %17 to float
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%19 = call i32 @llvm.SI.buffer.load.dword.i32.v2i32(<16 x i8> %11, <2 x i32> <i32 0, i32 0>, i32 0, i32 0, i32 1, i32 1, i32 1, i32 1, i32 0)
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%20 = bitcast i32 %19 to float
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call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %14, float %16, float %18, float %20)
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ret void
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}
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; Function Attrs: nounwind readonly
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declare i32 @llvm.SI.buffer.load.dword.i32.i32(<16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #1
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; Function Attrs: nounwind readonly
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declare i32 @llvm.SI.buffer.load.dword.i32.v2i32(<16 x i8>, <2 x i32>, i32, i32, i32, i32, i32, i32, i32) #1
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declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
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attributes #0 = { "ShaderType"="1" }
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attributes #1 = { nounwind readonly }
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!0 = !{!"const", null, i32 1}
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