mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2025-02-01 13:11:39 +01:00
dd229b271a
Summary: Since the changes to introduce vec3 and vec5, INSERT_VECTOR for these sizes has been marked "expand", which made LegalizeDAG lower it to loads and stores via a stack slot. The code got optimized a bit later, but the now-unused stack slot was never deleted. This commit avoids that problem by custom lowering INSERT_SUBVECTOR into an EXTRACT_VECTOR_ELT and INSERT_VECTOR_ELT for each element in the subvector to insert. V2: Addressed review comments re test. Differential Revision: https://reviews.llvm.org/D63160 Change-Id: I9e3c13e36f68cfa3431bb9814851cc1f673274e1 llvm-svn: 365148
33 lines
1.1 KiB
LLVM
33 lines
1.1 KiB
LLVM
; RUN: llc -mtriple amdgcn-amd-- -mcpu=bonaire -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
|
|
|
|
; Before the fix that this test was committed with, this code would leave
|
|
; an unused stack slot, causing ScratchSize to be non-zero.
|
|
|
|
; GCN-LABEL: store_v3i32:
|
|
; GCN: ds_read_b64
|
|
; GCN: ds_read_b32
|
|
; GCN: ds_write_b32
|
|
; GCN: ds_write_b64
|
|
; GCN: ScratchSize: 0
|
|
define amdgpu_kernel void @store_v3i32(<3 x i32> addrspace(3)* %out, <3 x i32> %a) nounwind {
|
|
%val = load <3 x i32>, <3 x i32> addrspace(3)* %out
|
|
%val.1 = add <3 x i32> %a, %val
|
|
store <3 x i32> %val.1, <3 x i32> addrspace(3)* %out, align 16
|
|
ret void
|
|
}
|
|
|
|
; GCN-LABEL: store_v5i32:
|
|
; GCN: ds_read2_b64
|
|
; GCN: ds_read_b32
|
|
; GCN: ds_write_b32
|
|
; GCN: ds_write2_b64
|
|
; GCN: ScratchSize: 0
|
|
define amdgpu_kernel void @store_v5i32(<5 x i32> addrspace(3)* %out, <5 x i32> %a) nounwind {
|
|
%val = load <5 x i32>, <5 x i32> addrspace(3)* %out
|
|
%val.1 = add <5 x i32> %a, %val
|
|
store <5 x i32> %val.1, <5 x i32> addrspace(3)* %out, align 16
|
|
ret void
|
|
}
|
|
|
|
|