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434b09b95f
There are two add-immediate instructions in Thumb1: tADDi8 and tADDi3. Only the latter supports using different source and destination registers, so whenever we materialize a new base register (at a certain offset) we'd do so by moving the base register value to the new register and then adding in place. This patch changes the code to use a single tADDi3 if the offset is small enough to fit in 3 bits. Differential Revision: http://reviews.llvm.org/D5006 llvm-svn: 216193
43 lines
1.6 KiB
LLVM
43 lines
1.6 KiB
LLVM
; RUN: llc < %s -mtriple=thumbv6m-eabi -verify-machineinstrs -o - | FileCheck %s
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@X = external global [0 x i32] ; <[0 x i32]*> [#uses=5]
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define i32 @t1() {
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; CHECK-LABEL: t1:
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; CHECK: push {r7, lr}
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; CHECK: ldm
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; CHECK: pop {r7, pc}
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%tmp = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 0) ; <i32> [#uses=1]
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%tmp3 = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 1) ; <i32> [#uses=1]
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%tmp4 = call i32 @f1( i32 %tmp, i32 %tmp3 ) ; <i32> [#uses=1]
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ret i32 %tmp4
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}
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define i32 @t2() {
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; CHECK-LABEL: t2:
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; CHECK: push {r7, lr}
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; CHECK: ldm
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; CHECK: pop {r7, pc}
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%tmp = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 2) ; <i32> [#uses=1]
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%tmp3 = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 3) ; <i32> [#uses=1]
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%tmp5 = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 4) ; <i32> [#uses=1]
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%tmp6 = call i32 @f2( i32 %tmp, i32 %tmp3, i32 %tmp5 ) ; <i32> [#uses=1]
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ret i32 %tmp6
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}
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define i32 @t3() {
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; CHECK-LABEL: t3:
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; CHECK: push {r7, lr}
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; CHECK: ldm
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; CHECK: pop {r7, pc}
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%tmp = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 1) ; <i32> [#uses=1]
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%tmp3 = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 2) ; <i32> [#uses=1]
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%tmp5 = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 3) ; <i32> [#uses=1]
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%tmp6 = call i32 @f2( i32 %tmp, i32 %tmp3, i32 %tmp5 ) ; <i32> [#uses=1]
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ret i32 %tmp6
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}
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declare i32 @f1(i32, i32)
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declare i32 @f2(i32, i32, i32)
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