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0ac8aa21f4
This is the second minimal patch keeping Nios2 target buildable. I'm adding subtarget here and other stuff for frame lowering, instruction, register information methods. I do not add any test cases, as still there are missing parts like DAG selector and assembly printing. I plan to include them into the next patch. Patch by Andrei Grischenko <andrei.l.grischenko@intel.com> Differential Revision: https://reviews.llvm.org/D37256 llvm-svn: 313626
51 lines
1.5 KiB
C++
51 lines
1.5 KiB
C++
//===-- Nios2RegisterInfo.cpp - Nios2 Register Information -== ------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the Nios2 implementation of the TargetRegisterInfo class.
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "nios2-reg-info"
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#include "Nios2RegisterInfo.h"
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#include "Nios2.h"
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#include "Nios2Subtarget.h"
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#define GET_REGINFO_TARGET_DESC
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#include "Nios2GenRegisterInfo.inc"
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using namespace llvm;
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Nios2RegisterInfo::Nios2RegisterInfo(const Nios2Subtarget &ST)
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: Nios2GenRegisterInfo(Nios2::RA), Subtarget(ST) {}
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const TargetRegisterClass *Nios2RegisterInfo::intRegClass(unsigned Size) const {
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return &Nios2::CPURegsRegClass;
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}
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const MCPhysReg *
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Nios2RegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
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return nullptr;
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}
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BitVector Nios2RegisterInfo::getReservedRegs(const MachineFunction &MF) const {
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BitVector Reserved(1);
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return Reserved;
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}
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void Nios2RegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
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int SPAdj, unsigned FIOperandNum,
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RegScavenger *RS) const {}
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unsigned Nios2RegisterInfo::getFrameRegister(const MachineFunction &MF) const {
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return 0;
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}
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