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In order to correctly load an all-ones FP NaN value into a floating point register with a VGBM, the analyzed 32/64 FP bits must first be shifted left (into element 0 of the vector register). SystemZVectorConstantInfo has so far relied on element replication which has bypassed the need to do this shift, but now it is clear that this must be done in order to handle NaNs. Review: Ulrich Weigand Differential Revision: https://reviews.llvm.org/D89389
76 lines
1.1 KiB
LLVM
76 lines
1.1 KiB
LLVM
; Test loads of FP constants with VGM and VGBM.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s
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define double @f1() {
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; CHECK-LABEL: f1:
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; CHECK: vgmg %v0, 2, 11
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ret double 1.0
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}
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define double @f2() {
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; CHECK-LABEL: f2:
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; CHECK: vgmg %v0, 1, 1
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ret double 2.0
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}
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define double @f3() {
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; CHECK-LABEL: f3:
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; CHECK: vgmg %v0, 0, 1
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ret double -2.0
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}
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define double @f4() {
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; CHECK-LABEL: f4:
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; CHECK: vgmg %v0, 2, 10
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ret double 0.5
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}
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define double @f5() {
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; CHECK-LABEL: f5:
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; CHECK: vgmg %v0, 2, 9
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ret double 0.125
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}
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define float @f6() {
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; CHECK-LABEL: f6:
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; CHECK: vgmf %v0, 2, 8
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ret float 1.0
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}
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define float @f7() {
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; CHECK-LABEL: f7:
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; CHECK: vgmf %v0, 1, 1
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ret float 2.0
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}
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define float @f8() {
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; CHECK-LABEL: f8:
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; CHECK: vgmf %v0, 0, 1
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ret float -2.0
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}
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define float @f9() {
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; CHECK-LABEL: f9:
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; CHECK: vgmf %v0, 2, 7
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ret float 0.5
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}
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define float @f10() {
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; CHECK-LABEL: f10:
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; CHECK: vgmf %v0, 2, 6
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ret float 0.125
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}
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define float @f11() {
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; CHECK-LABEL: f11:
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; CHECK: vgbm %v0, 61440
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ret float 0xFFFFFFFFE0000000
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}
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define double @f12() {
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; CHECK-LABEL: f12:
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; CHECK: vgbm %v0, 61440
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ret double 0xFFFFFFFF00000000
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}
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