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149 lines
4.7 KiB
LLVM
149 lines
4.7 KiB
LLVM
; Verify that floating-point strict signaling compares cannot be omitted
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; even if CC already has the right value.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 \
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; RUN: -enable-misched=0 -no-integrated-as | FileCheck %s
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;
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; We need -enable-misched=0 to make sure f12 and following routines really
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; test the compare elimination pass.
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declare float @llvm.fabs.f32(float %f)
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; Test addition followed by EQ, which could use the CC result of the addition.
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define float @f1(float %a, float %b, float *%dest) #0 {
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; CHECK-LABEL: f1:
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; CHECK-DAG: aebr %f0, %f2
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; CHECK-DAG: lzer [[REG:%f[0-9]+]]
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; CHECK-NEXT: kebr %f0, [[REG]]
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; CHECK-NEXT: ber %r14
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; CHECK: br %r14
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entry:
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%res = call float @llvm.experimental.constrained.fadd.f32(
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float %a, float %b,
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metadata !"round.dynamic",
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metadata !"fpexcept.strict") #0
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%cmp = call i1 @llvm.experimental.constrained.fcmps.f32(
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float %res, float 0.0,
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metadata !"oeq",
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metadata !"fpexcept.strict") #0
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br i1 %cmp, label %exit, label %store
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store:
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store float %b, float *%dest
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br label %exit
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exit:
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ret float %res
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}
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; Test the result of LOAD POSITIVE.
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define float @f6(float %dummy, float %a, float *%dest) #0 {
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; CHECK-LABEL: f6:
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; CHECK-DAG: lpdfr %f0, %f2
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; CHECK-DAG: lzer [[REG:%f[0-9]+]]
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; CHECK-NEXT: kebr %f0, [[REG]]
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; CHECK-NEXT: bhr %r14
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; CHECK: br %r14
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entry:
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%res = call float @llvm.fabs.f32(float %a) #0
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%cmp = call i1 @llvm.experimental.constrained.fcmps.f32(
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float %res, float 0.0,
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metadata !"ogt",
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metadata !"fpexcept.strict") #0
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br i1 %cmp, label %exit, label %store
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store:
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store float %res, float *%dest
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br label %exit
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exit:
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ret float %res
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}
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; Test the result of LOAD NEGATIVE.
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define float @f7(float %dummy, float %a, float *%dest) #0 {
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; CHECK-LABEL: f7:
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; CHECK-DAG: lndfr %f0, %f2
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; CHECK-DAG: lzer [[REG:%f[0-9]+]]
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; CHECK-NEXT: kebr %f0, [[REG]]
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; CHECK-NEXT: blr %r14
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; CHECK: br %r14
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entry:
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%abs = call float @llvm.fabs.f32(float %a) #0
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%res = fneg float %abs
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%cmp = call i1 @llvm.experimental.constrained.fcmps.f32(
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float %res, float 0.0,
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metadata !"olt",
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metadata !"fpexcept.strict") #0
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br i1 %cmp, label %exit, label %store
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store:
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store float %res, float *%dest
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br label %exit
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exit:
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ret float %res
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}
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; Test the result of LOAD COMPLEMENT.
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define float @f8(float %dummy, float %a, float *%dest) #0 {
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; CHECK-LABEL: f8:
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; CHECK-DAG: lcdfr %f0, %f2
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; CHECK-DAG: lzer [[REG:%f[0-9]+]]
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; CHECK-NEXT: kebr %f0, [[REG]]
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; CHECK-NEXT: bler %r14
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; CHECK: br %r14
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entry:
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%res = fneg float %a
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%cmp = call i1 @llvm.experimental.constrained.fcmps.f32(
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float %res, float 0.0,
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metadata !"ole",
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metadata !"fpexcept.strict") #0
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br i1 %cmp, label %exit, label %store
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store:
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store float %res, float *%dest
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br label %exit
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exit:
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ret float %res
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}
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; Test that LER does not get converted to LTEBR.
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define float @f12(float %dummy, float %val) #0 {
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; CHECK-LABEL: f12:
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; CHECK: ler %f0, %f2
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; CHECK-NEXT: #APP
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; CHECK-NEXT: blah %f0
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: lzer [[REG:%f[0-9]+]]
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; CHECK-NEXT: kebr %f2, [[REG]]
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; CHECK-NEXT: blr %r14
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; CHECK: br %r14
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entry:
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%ret = call float asm "blah $1", "=f,{f0}"(float %val) #0
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%cmp = call i1 @llvm.experimental.constrained.fcmps.f32(
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float %val, float 0.0,
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metadata !"olt",
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metadata !"fpexcept.strict") #0
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br i1 %cmp, label %exit, label %store
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store:
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call void asm sideeffect "blah", ""() #0
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br label %exit
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exit:
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ret float %ret
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}
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attributes #0 = { strictfp }
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declare float @llvm.experimental.constrained.fadd.f32(float, float, metadata, metadata)
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declare float @llvm.experimental.constrained.fsub.f32(float, float, metadata, metadata)
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declare float @llvm.experimental.constrained.fmul.f32(float, float, metadata, metadata)
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declare float @llvm.experimental.constrained.fdiv.f32(float, float, metadata, metadata)
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declare i1 @llvm.experimental.constrained.fcmps.f32(float, float, metadata, metadata)
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declare i1 @llvm.experimental.constrained.fcmps.f64(double, double, metadata, metadata)
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declare i1 @llvm.experimental.constrained.fcmps.f128(fp128, fp128, metadata, metadata)
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