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deba7b1d7c
ISD::ROTL/ROTR rotation values are guaranteed to act as a modulo amount, so for power-of-2 bitwidths we only need the lowest bits. Differential Revision: https://reviews.llvm.org/D76201
95 lines
2.1 KiB
LLVM
95 lines
2.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; Test removal of AND operations that don't affect last 6 bits of rotate amount
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; operand.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
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; Test that AND is not removed when some lower 5 bits are not set.
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define i32 @f1(i32 %val, i32 %amt) {
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; CHECK-LABEL: f1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: nill %r3, 15
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; CHECK-NEXT: rll %r2, %r2, 0(%r3)
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; CHECK-NEXT: br %r14
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%and = and i32 %amt, 15
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%inv = sub i32 32, %and
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%parta = shl i32 %val, %and
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%partb = lshr i32 %val, %inv
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%rotl = or i32 %parta, %partb
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ret i32 %rotl
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}
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; Test removal of AND mask with only bottom 6 bits set.
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define i32 @f2(i32 %val, i32 %amt) {
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; CHECK-LABEL: f2:
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; CHECK: # %bb.0:
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; CHECK-NEXT: rll %r2, %r2, 0(%r3)
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; CHECK-NEXT: br %r14
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%and = and i32 %amt, 63
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%inv = sub i32 32, %and
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%parta = shl i32 %val, %and
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%partb = lshr i32 %val, %inv
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%rotl = or i32 %parta, %partb
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ret i32 %rotl
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}
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; Test removal of AND mask including but not limited to bottom 6 bits.
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define i32 @f3(i32 %val, i32 %amt) {
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; CHECK-LABEL: f3:
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; CHECK: # %bb.0:
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; CHECK-NEXT: rll %r2, %r2, 0(%r3)
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; CHECK-NEXT: br %r14
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%and = and i32 %amt, 255
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%inv = sub i32 32, %and
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%parta = shl i32 %val, %and
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%partb = lshr i32 %val, %inv
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%rotl = or i32 %parta, %partb
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ret i32 %rotl
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}
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; Test removal of AND mask from RLLG.
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define i64 @f4(i64 %val, i64 %amt) {
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; CHECK-LABEL: f4:
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; CHECK: # %bb.0:
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; CHECK-NEXT: rllg %r2, %r2, 0(%r3)
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; CHECK-NEXT: br %r14
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%and = and i64 %amt, 63
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%inv = sub i64 64, %and
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%parta = shl i64 %val, %and
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%partb = lshr i64 %val, %inv
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%rotl = or i64 %parta, %partb
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ret i64 %rotl
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}
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; Test that AND is not entirely removed if the result is reused.
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define i32 @f5(i32 %val, i32 %amt) {
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; CHECK-LABEL: f5:
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; CHECK: # %bb.0:
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; CHECK-NEXT: rll %r2, %r2, 0(%r3)
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; CHECK-NEXT: nilf %r3, 63
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; CHECK-NEXT: ar %r2, %r3
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; CHECK-NEXT: br %r14
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%and = and i32 %amt, 63
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%inv = sub i32 32, %and
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%parta = shl i32 %val, %and
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%partb = lshr i32 %val, %inv
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%rotl = or i32 %parta, %partb
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%reuse = add i32 %and, %rotl
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ret i32 %reuse
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}
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