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8d64999daf
PPC-64 doesn't work.) This also lowers the spilling of the CR registers so that it uses a register other than the default R0 register (the scavenger scrounges for one). A significant part of this patch fixes how kill information is handled. llvm-svn: 47863
95 lines
3.4 KiB
C++
95 lines
3.4 KiB
C++
//===- PPCRegisterInfo.h - PowerPC Register Information Impl -----*- C++ -*-==//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the PowerPC implementation of the TargetRegisterInfo
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// class.
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//
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//===----------------------------------------------------------------------===//
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#ifndef POWERPC32_REGISTERINFO_H
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#define POWERPC32_REGISTERINFO_H
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#include "PPC.h"
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#include "PPCGenRegisterInfo.h.inc"
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#include <map>
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namespace llvm {
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class PPCSubtarget;
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class TargetInstrInfo;
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class Type;
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class PPCRegisterInfo : public PPCGenRegisterInfo {
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std::map<unsigned, unsigned> ImmToIdxMap;
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const PPCSubtarget &Subtarget;
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const TargetInstrInfo &TII;
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public:
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PPCRegisterInfo(const PPCSubtarget &SubTarget, const TargetInstrInfo &tii);
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/// getRegisterNumbering - Given the enum value for some register, e.g.
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/// PPC::F14, return the number that it corresponds to (e.g. 14).
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static unsigned getRegisterNumbering(unsigned RegEnum);
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/// Code Generation virtual methods...
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void reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
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unsigned DestReg, const MachineInstr *Orig) const;
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const unsigned *getCalleeSavedRegs(const MachineFunction* MF = 0) const;
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const TargetRegisterClass* const*
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getCalleeSavedRegClasses(const MachineFunction *MF = 0) const;
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BitVector getReservedRegs(const MachineFunction &MF) const;
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/// targetHandlesStackFrameRounding - Returns true if the target is
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/// responsible for rounding up the stack frame (probably at emitPrologue
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/// time).
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bool targetHandlesStackFrameRounding() const { return true; }
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/// requiresRegisterScavenging - We require a register scavenger.
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/// FIXME (64-bit): Should be inlined.
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bool requiresRegisterScavenging(const MachineFunction &MF) const;
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bool hasFP(const MachineFunction &MF) const;
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void eliminateCallFramePseudoInstr(MachineFunction &MF,
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MachineBasicBlock &MBB,
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MachineBasicBlock::iterator I) const;
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void lowerDynamicAlloc(MachineBasicBlock::iterator II,
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int SPAdj, RegScavenger *RS) const;
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void lowerCRSpilling(MachineBasicBlock::iterator II, unsigned FrameIndex,
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int SPAdj, RegScavenger *RS) const;
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void eliminateFrameIndex(MachineBasicBlock::iterator II,
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int SPAdj, RegScavenger *RS = NULL) const;
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/// determineFrameLayout - Determine the size of the frame and maximum call
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/// frame size.
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void determineFrameLayout(MachineFunction &MF) const;
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void processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
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RegScavenger *RS = NULL) const;
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void emitPrologue(MachineFunction &MF) const;
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void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
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// Debug information queries.
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unsigned getRARegister() const;
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unsigned getFrameRegister(MachineFunction &MF) const;
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void getInitialFrameState(std::vector<MachineMove> &Moves) const;
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// Exception handling queries.
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unsigned getEHExceptionRegister() const;
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unsigned getEHHandlerRegister() const;
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int getDwarfRegNum(unsigned RegNum, bool isEH) const;
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};
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} // end namespace llvm
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#endif
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