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d4c615be8c
Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
29 lines
615 B
YAML
29 lines
615 B
YAML
# RUN: llc -march=hexagon -run-pass post-RA-sched %s -o - | FileCheck %s
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# The two loads from %a ($r0) can cause a bank conflict. Check that they
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# are not scheduled next to each other.
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# CHECK: L2_loadri_io $r0, 8
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# CHECK: L2_loadri_io killed $r1, 0
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# CHECK: L2_loadri_io killed $r0, 12
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--- |
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define void @foo(i32* %a, i32* %b) {
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ret void
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}
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...
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---
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name: foo
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $r0, $r1
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$r2 = L2_loadri_io $r0, 8 :: (load 4 from %ir.a)
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$r3 = L2_loadri_io killed $r0, 12 :: (load 4 from %ir.a)
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$r4 = L2_loadri_io killed $r1, 0 :: (load 4 from %ir.b)
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...
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