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0212e0df47
instructions to help disassembly. We also changed the output of the addressing modes to omit the '+' from the assembler syntax #+/-<imm> or +/-<Rm>. See, for example, A8.6.57/58/60. And modified test cases to not expect '+' in +reg or #+num. For example, ; CHECK: ldr.w r9, [r7, #28] llvm-svn: 98745
48 lines
1.8 KiB
LLVM
48 lines
1.8 KiB
LLVM
; RUN: llc < %s -march=arm | FileCheck %s
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; This loop is rewritten with an indvar which counts down, which
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; frees up a register from holding the trip count.
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define void @test(i32* %P, i32 %A, i32 %i) nounwind {
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entry:
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; CHECK: str r1, [{{r.*}}, {{r.*}}, lsl #2]
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icmp eq i32 %i, 0 ; <i1>:0 [#uses=1]
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br i1 %0, label %return, label %bb
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bb: ; preds = %bb, %entry
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%indvar = phi i32 [ 0, %entry ], [ %indvar.next, %bb ] ; <i32> [#uses=2]
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%i_addr.09.0 = sub i32 %i, %indvar ; <i32> [#uses=1]
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%tmp2 = getelementptr i32* %P, i32 %i_addr.09.0 ; <i32*> [#uses=1]
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store i32 %A, i32* %tmp2
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%indvar.next = add i32 %indvar, 1 ; <i32> [#uses=2]
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icmp eq i32 %indvar.next, %i ; <i1>:1 [#uses=1]
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br i1 %1, label %return, label %bb
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return: ; preds = %bb, %entry
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ret void
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}
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; This loop has a non-address use of the count-up indvar, so
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; it'll remain. Now the original store uses a negative-stride address.
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define void @test_with_forced_iv(i32* %P, i32 %A, i32 %i) nounwind {
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entry:
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; CHECK: str r1, [{{r.*}}, -{{r.*}}, lsl #2]
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icmp eq i32 %i, 0 ; <i1>:0 [#uses=1]
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br i1 %0, label %return, label %bb
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bb: ; preds = %bb, %entry
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%indvar = phi i32 [ 0, %entry ], [ %indvar.next, %bb ] ; <i32> [#uses=2]
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%i_addr.09.0 = sub i32 %i, %indvar ; <i32> [#uses=1]
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%tmp2 = getelementptr i32* %P, i32 %i_addr.09.0 ; <i32*> [#uses=1]
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store i32 %A, i32* %tmp2
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store i32 %indvar, i32* null
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%indvar.next = add i32 %indvar, 1 ; <i32> [#uses=2]
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icmp eq i32 %indvar.next, %i ; <i1>:1 [#uses=1]
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br i1 %1, label %return, label %bb
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return: ; preds = %bb, %entry
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ret void
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}
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