Tanya Lattner 1d440e4782 Forced branches to be first to be scheduled. ... llvm-svn: 18195		2004-11-24 01:49:10 +00:00
..
InstrSched
LiveVar
ModuloScheduling	Forced branches to be first to be scheduled.	2004-11-24 01:49:10 +00:00
RegAlloc
.cvsignore
DecomposeMultiDimRefs.cpp
EmitBytecodeToAssembly.cpp
InternalGlobalMapper.cpp
MachineCodeForInstruction.cpp
MachineCodeForInstruction.h
MachineFunctionInfo.cpp
MachineFunctionInfo.h
MachineInstrAnnot.h
Makefile
MappingInfo.cpp
MappingInfo.h
SparcV9_F2.td
SparcV9_F3.td
SparcV9_F4.td
SparcV9.burg.in
SparcV9.td
SparcV9AsmPrinter.cpp
SparcV9BurgISel.cpp	Changed the CreateCodeToLoadConst function to preserve SSA form. This basically means adding extra tmp instructions for intermediate values.	2004-11-23 04:22:29 +00:00
SparcV9BurgISel.h
SparcV9CodeEmitter.cpp	Squelch a bogus warning	2004-11-23 15:57:01 +00:00
SparcV9CodeEmitter.h	Remove JIT-specific code from the code emitter.	2004-11-22 20:25:10 +00:00
SparcV9FrameInfo.cpp
SparcV9FrameInfo.h
SparcV9Instr.def
SparcV9InstrForest.h
SparcV9InstrInfo.h
SparcV9InstrInfo.td
SparcV9Internals.h
SparcV9JITInfo.cpp	Implement the Sparc JIT interfaces, including relocation support.	2004-11-22 20:24:27 +00:00
SparcV9JITInfo.h	New methods implemented	2004-11-22 20:24:42 +00:00
SparcV9PeepholeOpts.cpp
SparcV9PreSelection.cpp
SparcV9PrologEpilogInserter.cpp
SparcV9RegClassInfo.cpp
SparcV9RegClassInfo.h
SparcV9RegInfo.cpp
SparcV9RegInfo.h
SparcV9RegisterInfo.cpp
SparcV9RegisterInfo.h
SparcV9RegisterInfo.td
SparcV9Relocations.h	Initial checkin of the V9 relocation types	2004-11-22 00:40:51 +00:00
SparcV9SchedInfo.cpp
SparcV9StackSlots.cpp
SparcV9TargetMachine.cpp	Made modsched hidden and changed so it matches the style of other options.	2004-11-19 23:34:33 +00:00
SparcV9TargetMachine.h
SparcV9TmpInstr.cpp
SparcV9TmpInstr.h