Matt Arsenault 2c5f486332 AMDGPU: Set DX10Clamp bit ... llvm-svn: 259088		2016-01-28 20:53:35 +00:00
..
AArch64	[DAGCombiner] Don't add volatile or indexed stores to ChainedStores	2016-01-28 06:23:33 +00:00
AMDGPU	AMDGPU: Set DX10Clamp bit	2016-01-28 20:53:35 +00:00
ARM	Address buildbot fallout from r259065	2016-01-28 18:59:04 +00:00
BPF
CPP
Generic	Remove autoconf support	2016-01-26 21:29:08 +00:00
Hexagon	[Hexagon] Use general purpose registers to spill pred/mod registers into	2016-01-22 19:15:58 +00:00
Inputs
Mips	[mips][microMIPS] Disable FastISel for microMIPS	2016-01-28 11:08:03 +00:00
MIR
MSP430
NVPTX	[CUDA] Die gracefully when trying to output an LLVM alias.	2016-01-23 21:12:20 +00:00
PowerPC	Address buildbot fallout from r259065	2016-01-28 18:59:04 +00:00
SPARC
SystemZ
Thumb	[MC] Use .p2align instead of .align	2016-01-26 00:03:25 +00:00
Thumb2	Address buildbot fallout from r259065	2016-01-28 18:59:04 +00:00
WebAssembly	[WebAssembly] Don't stackify a register def past a get_local use in the same tree.	2016-01-28 03:59:09 +00:00
WinEH	[WinEH] Don't miscompile cleanups which conditionally unwind to caller	2016-01-23 23:54:33 +00:00
X86	[X86] Don't transform X << 1 to X + X during type legalization	2016-01-28 18:20:05 +00:00
XCore	[MC] Use .p2align instead of .align	2016-01-26 00:03:25 +00:00