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AsmParser
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[RISCV] Update V extension to v1.0-draft 08a0b464.
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2021-01-26 12:02:43 +08:00 |
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Disassembler
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[RISCV] Merge Utils library into MCTargetDesc
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2021-01-14 11:47:30 -08:00 |
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MCTargetDesc
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[RISCV] Update V extension to v1.0-draft 08a0b464.
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2021-01-26 12:02:43 +08:00 |
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TargetInfo
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llvmbuildectomy - replace llvm-build by plain cmake
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2020-11-13 10:35:24 +01:00 |
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CMakeLists.txt
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[RISCV] Merge Utils library into MCTargetDesc
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2021-01-14 11:47:30 -08:00 |
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RISCV.h
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[RISCV] Merge Utils library into MCTargetDesc
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2021-01-14 11:47:30 -08:00 |
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RISCV.td
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[RISCV] Fix name of Zba extension (NFC)
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2021-01-24 21:02:34 +00:00 |
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RISCVAsmPrinter.cpp
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RISCVCallingConv.td
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RISCVCallLowering.cpp
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[GlobalISel] Base implementation for sret demotion.
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2021-01-06 10:30:50 +05:30 |
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RISCVCallLowering.h
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[GlobalISel] Base implementation for sret demotion.
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2021-01-06 10:30:50 +05:30 |
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RISCVCleanupVSETVLI.cpp
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[RISCV] Add a pass to remove duplicate VSETVLI instructions in a basic block.
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2020-12-11 10:35:37 -08:00 |
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RISCVExpandAtomicPseudoInsts.cpp
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RISCVExpandPseudoInsts.cpp
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[RISCV] Define vmclr.m/vmset.m intrinsics.
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2020-12-28 18:57:17 -08:00 |
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RISCVFrameLowering.cpp
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[RISCV] Do not grow the stack a second time when we need to realign the stack
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2021-01-09 16:51:09 +00:00 |
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RISCVFrameLowering.h
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RISCVInstrFormats.td
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[RISCV] Update V instructions constraints to conform to v1.0
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2021-01-22 01:15:55 +08:00 |
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RISCVInstrFormatsC.td
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RISCVInstrFormatsV.td
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[RISCV] New vector load/store in V extension v1.0
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2021-01-22 07:30:09 +08:00 |
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RISCVInstrInfo.cpp
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[RISCV] Merge Utils library into MCTargetDesc
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2021-01-14 11:47:30 -08:00 |
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RISCVInstrInfo.h
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[RISCV] Don't include CodeGen layer files in MC layer
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2020-11-12 07:45:38 -08:00 |
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RISCVInstrInfo.td
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[RISCV] Add isel patterns to optimize slli.uw patterns without Zba extension.
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2021-01-25 16:12:08 -08:00 |
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RISCVInstrInfoA.td
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RISCVInstrInfoB.td
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[RISCV] Add isel patterns to optimize slli.uw patterns without Zba extension.
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2021-01-25 16:12:08 -08:00 |
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RISCVInstrInfoC.td
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[RISCV] Add way to mark CompressPats that should only be used for compressing.
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2021-01-20 09:20:15 -08:00 |
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RISCVInstrInfoD.td
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[RISCV][LegalizeDAG] Expand SETO and SETUO comparisons. Teach LegalizeDAG to expand SETUO expansion when UNE isn't legal.
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2020-12-10 09:15:52 -08:00 |
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RISCVInstrInfoF.td
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[RISCV][LegalizeDAG] Expand SETO and SETUO comparisons. Teach LegalizeDAG to expand SETUO expansion when UNE isn't legal.
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2020-12-10 09:15:52 -08:00 |
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RISCVInstrInfoM.td
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[RISCV] Don't remove (and X, 0xffffffff) from inputs when matching RISCVISD::DIVUW/REMUW to 64-bit DIVU/REMU.
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2020-11-26 23:15:41 -08:00 |
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RISCVInstrInfoV.td
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[RISCV] New vector load/store in V extension v1.0
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2021-01-22 07:30:09 +08:00 |
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RISCVInstrInfoVPseudos.td
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[RISCV] Implement vlsegff intrinsics.
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2021-01-26 12:02:43 +08:00 |
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RISCVInstrInfoVSDPatterns.td
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[RISCV] Add RVV insertelt/extractelt scalable-vector patterns
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2021-01-25 22:03:52 +00:00 |
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RISCVInstrInfoZfh.td
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[RISCV][LegalizeDAG] Expand SETO and SETUO comparisons. Teach LegalizeDAG to expand SETUO expansion when UNE isn't legal.
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2020-12-10 09:15:52 -08:00 |
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RISCVInstructionSelector.cpp
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RISCVISelDAGToDAG.cpp
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[RISCV] Implement vlsegff intrinsics.
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2021-01-26 12:02:43 +08:00 |
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RISCVISelDAGToDAG.h
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[RISCV] Implement vlsegff intrinsics.
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2021-01-26 12:02:43 +08:00 |
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RISCVISelLowering.cpp
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[RISCV] Implement vlsegff intrinsics.
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2021-01-26 12:02:43 +08:00 |
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RISCVISelLowering.h
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[RISCV] Implement vlsegff intrinsics.
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2021-01-26 12:02:43 +08:00 |
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RISCVLegalizerInfo.cpp
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RISCVLegalizerInfo.h
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RISCVMachineFunctionInfo.h
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RISCVMCInstLower.cpp
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[RISCV] Add a VL output to vleff intrinsics.
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2021-01-21 17:19:58 -08:00 |
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RISCVMergeBaseOffset.cpp
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[RISCV] Support Zfh half-precision floating-point extension.
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2020-12-03 09:16:33 +08:00 |
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RISCVRegisterBankInfo.cpp
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RISCVRegisterBankInfo.h
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RISCVRegisterBanks.td
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RISCVRegisterInfo.cpp
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[RISCV] Define the remaining vector fixed-point arithmetic intrinsics.
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2020-12-20 22:57:07 -08:00 |
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RISCVRegisterInfo.h
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RISCVRegisterInfo.td
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[RISCV] Correct DWARF number for vector registers.
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2021-01-22 11:33:42 +08:00 |
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RISCVSchedRocket.td
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RISCVSchedSiFive7.td
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RISCVSchedule.td
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RISCVSubtarget.cpp
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RISCVSubtarget.h
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[RISCV] Add Zba feature and move add.uw and slli.uw to it.
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2021-01-22 12:49:10 -08:00 |
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RISCVSystemOperands.td
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RISCVTargetMachine.cpp
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[RISCV] Merge Utils library into MCTargetDesc
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2021-01-14 11:47:30 -08:00 |
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RISCVTargetMachine.h
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[RISCV] Address clang-tidy warnings in RISCVTargetMachine. NFC.
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2020-12-18 21:50:55 +00:00 |
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RISCVTargetObjectFile.cpp
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RISCVTargetObjectFile.h
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RISCVTargetTransformInfo.cpp
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[RISCV] Merge Utils library into MCTargetDesc
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2021-01-14 11:47:30 -08:00 |
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RISCVTargetTransformInfo.h
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