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e031e390d0
Very similar to ARM implementation, just maps to an MRS. Should fix PR25191. Patch by Michael Brase. llvm-svn: 335118
24 lines
482 B
LLVM
24 lines
482 B
LLVM
; RUN: llc -mtriple=aarch64 < %s | FileCheck %s
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define i64 @GetFpcr() {
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; CHECK-LABEL: GetFpcr
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; CHECK: mrs x0, FPCR
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; CHECK: ret
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%1 = tail call i64 @llvm.aarch64.get.fpcr()
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ret i64 %1
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}
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declare i64 @llvm.aarch64.get.fpcr() #0
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define i32 @GetFltRounds() {
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; CHECK-LABEL: GetFltRounds
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; CHECK: mrs x8, FPCR
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; CHECK: add w8, w8, #1024, lsl #12
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; CHECK: ubfx w0, w8, #22, #2
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; CHECK: ret
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%1 = tail call i32 @llvm.flt.rounds()
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ret i32 %1
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}
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declare i32 @llvm.flt.rounds() #0
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