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961f3df27b
As part of the unification of the debug format and the MIR format, always print registers as lowercase. * Only debug printing is affected. It now follows MIR. Differential Revision: https://reviews.llvm.org/D40417 llvm-svn: 319187
14 lines
526 B
LLVM
14 lines
526 B
LLVM
; RUN: llc < %s -mtriple=i686-- -mattr=+sse2,-avx | grep -i edi
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; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2,-avx | grep -i rdi
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; RUN: llc < %s -mtriple=i686-- -mattr=+avx | grep -i edi
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; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx | grep -i rdi
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; rdar://6573467
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define void @test(<16 x i8> %a, <16 x i8> %b, i32 %dummy, i8* %c) nounwind {
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entry:
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tail call void @llvm.x86.sse2.maskmov.dqu( <16 x i8> %a, <16 x i8> %b, i8* %c )
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ret void
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}
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declare void @llvm.x86.sse2.maskmov.dqu(<16 x i8>, <16 x i8>, i8*) nounwind
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