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9ce833945e
Patch by Howard Hinnant! llvm-svn: 90365
345 lines
12 KiB
C++
345 lines
12 KiB
C++
//===- SystemZRegisterInfo.cpp - SystemZ Register Information -------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the SystemZ implementation of the TargetRegisterInfo class.
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//
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//===----------------------------------------------------------------------===//
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#include "SystemZ.h"
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#include "SystemZInstrInfo.h"
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#include "SystemZMachineFunctionInfo.h"
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#include "SystemZRegisterInfo.h"
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#include "SystemZSubtarget.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/Target/TargetFrameInfo.h"
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#include "llvm/Target/TargetInstrInfo.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/TargetOptions.h"
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#include "llvm/ADT/BitVector.h"
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using namespace llvm;
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SystemZRegisterInfo::SystemZRegisterInfo(SystemZTargetMachine &tm,
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const SystemZInstrInfo &tii)
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: SystemZGenRegisterInfo(SystemZ::ADJCALLSTACKUP, SystemZ::ADJCALLSTACKDOWN),
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TM(tm), TII(tii) {
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}
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const unsigned*
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SystemZRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
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static const unsigned CalleeSavedRegs[] = {
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SystemZ::R6D, SystemZ::R7D, SystemZ::R8D, SystemZ::R9D,
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SystemZ::R10D, SystemZ::R11D, SystemZ::R12D, SystemZ::R13D,
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SystemZ::R14D, SystemZ::R15D,
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SystemZ::F8L, SystemZ::F9L, SystemZ::F10L, SystemZ::F11L,
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SystemZ::F12L, SystemZ::F13L, SystemZ::F14L, SystemZ::F15L,
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0
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};
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return CalleeSavedRegs;
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}
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const TargetRegisterClass* const*
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SystemZRegisterInfo::getCalleeSavedRegClasses(const MachineFunction *MF) const {
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static const TargetRegisterClass * const CalleeSavedRegClasses[] = {
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&SystemZ::GR64RegClass, &SystemZ::GR64RegClass,
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&SystemZ::GR64RegClass, &SystemZ::GR64RegClass,
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&SystemZ::GR64RegClass, &SystemZ::GR64RegClass,
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&SystemZ::GR64RegClass, &SystemZ::GR64RegClass,
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&SystemZ::GR64RegClass, &SystemZ::GR64RegClass,
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&SystemZ::FP64RegClass, &SystemZ::FP64RegClass,
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&SystemZ::FP64RegClass, &SystemZ::FP64RegClass,
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&SystemZ::FP64RegClass, &SystemZ::FP64RegClass,
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&SystemZ::FP64RegClass, &SystemZ::FP64RegClass, 0
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};
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return CalleeSavedRegClasses;
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}
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BitVector SystemZRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
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BitVector Reserved(getNumRegs());
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if (hasFP(MF))
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Reserved.set(SystemZ::R11D);
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Reserved.set(SystemZ::R14D);
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Reserved.set(SystemZ::R15D);
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return Reserved;
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}
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/// needsFP - Return true if the specified function should have a dedicated
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/// frame pointer register. This is true if the function has variable sized
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/// allocas or if frame pointer elimination is disabled.
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bool SystemZRegisterInfo::hasFP(const MachineFunction &MF) const {
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const MachineFrameInfo *MFI = MF.getFrameInfo();
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return NoFramePointerElim || MFI->hasVarSizedObjects();
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}
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void SystemZRegisterInfo::
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eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
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MachineBasicBlock::iterator I) const {
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MBB.erase(I);
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}
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int SystemZRegisterInfo::getFrameIndexOffset(MachineFunction &MF, int FI) const {
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const TargetFrameInfo &TFI = *MF.getTarget().getFrameInfo();
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MachineFrameInfo *MFI = MF.getFrameInfo();
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SystemZMachineFunctionInfo *SystemZMFI =
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MF.getInfo<SystemZMachineFunctionInfo>();
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int Offset = MFI->getObjectOffset(FI) + MFI->getOffsetAdjustment();
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uint64_t StackSize = MFI->getStackSize();
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// Fixed objects are really located in the "previous" frame.
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if (FI < 0)
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StackSize -= SystemZMFI->getCalleeSavedFrameSize();
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Offset += StackSize - TFI.getOffsetOfLocalArea();
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// Skip the register save area if we generated the stack frame.
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if (StackSize || MFI->hasCalls())
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Offset -= TFI.getOffsetOfLocalArea();
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return Offset;
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}
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unsigned
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SystemZRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
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int SPAdj, int *Value,
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RegScavenger *RS) const {
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assert(SPAdj == 0 && "Unxpected");
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unsigned i = 0;
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MachineInstr &MI = *II;
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MachineFunction &MF = *MI.getParent()->getParent();
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while (!MI.getOperand(i).isFI()) {
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++i;
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assert(i < MI.getNumOperands() && "Instr doesn't have FrameIndex operand!");
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}
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int FrameIndex = MI.getOperand(i).getIndex();
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unsigned BasePtr = (hasFP(MF) ? SystemZ::R11D : SystemZ::R15D);
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// This must be part of a rri or ri operand memory reference. Replace the
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// FrameIndex with base register with BasePtr. Add an offset to the
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// displacement field.
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MI.getOperand(i).ChangeToRegister(BasePtr, false);
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// Offset is a either 12-bit unsigned or 20-bit signed integer.
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// FIXME: handle "too long" displacements.
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int Offset = getFrameIndexOffset(MF, FrameIndex) + MI.getOperand(i+1).getImm();
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// Check whether displacement is too long to fit into 12 bit zext field.
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MI.setDesc(TII.getMemoryInstr(MI.getOpcode(), Offset));
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MI.getOperand(i+1).ChangeToImmediate(Offset);
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return 0;
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}
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void
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SystemZRegisterInfo::processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
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RegScavenger *RS) const {
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// Determine whether R15/R14 will ever be clobbered inside the function. And
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// if yes - mark it as 'callee' saved.
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MachineFrameInfo *FFI = MF.getFrameInfo();
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MachineRegisterInfo &MRI = MF.getRegInfo();
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// Check whether high FPRs are ever used, if yes - we need to save R15 as
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// well.
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static const unsigned HighFPRs[] = {
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SystemZ::F8L, SystemZ::F9L, SystemZ::F10L, SystemZ::F11L,
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SystemZ::F12L, SystemZ::F13L, SystemZ::F14L, SystemZ::F15L,
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SystemZ::F8S, SystemZ::F9S, SystemZ::F10S, SystemZ::F11S,
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SystemZ::F12S, SystemZ::F13S, SystemZ::F14S, SystemZ::F15S,
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};
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bool HighFPRsUsed = false;
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for (unsigned i = 0, e = array_lengthof(HighFPRs); i != e; ++i)
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HighFPRsUsed |= MRI.isPhysRegUsed(HighFPRs[i]);
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if (FFI->hasCalls())
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/* FIXME: function is varargs */
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/* FIXME: function grabs RA */
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/* FIXME: function calls eh_return */
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MRI.setPhysRegUsed(SystemZ::R14D);
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if (HighFPRsUsed ||
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FFI->hasCalls() ||
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FFI->getObjectIndexEnd() != 0 || // Contains automatic variables
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FFI->hasVarSizedObjects() // Function calls dynamic alloca's
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/* FIXME: function is varargs */)
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MRI.setPhysRegUsed(SystemZ::R15D);
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}
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/// emitSPUpdate - Emit a series of instructions to increment / decrement the
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/// stack pointer by a constant value.
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static
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void emitSPUpdate(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI,
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int64_t NumBytes, const TargetInstrInfo &TII) {
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unsigned Opc; uint64_t Chunk;
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bool isSub = NumBytes < 0;
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uint64_t Offset = isSub ? -NumBytes : NumBytes;
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if (Offset >= (1LL << 15) - 1) {
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Opc = SystemZ::ADD64ri32;
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Chunk = (1LL << 31) - 1;
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} else {
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Opc = SystemZ::ADD64ri16;
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Chunk = (1LL << 15) - 1;
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}
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DebugLoc DL = (MBBI != MBB.end() ? MBBI->getDebugLoc() :
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DebugLoc::getUnknownLoc());
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while (Offset) {
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uint64_t ThisVal = (Offset > Chunk) ? Chunk : Offset;
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MachineInstr *MI =
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BuildMI(MBB, MBBI, DL, TII.get(Opc), SystemZ::R15D)
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.addReg(SystemZ::R15D).addImm((isSub ? -(int64_t)ThisVal : ThisVal));
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// The PSW implicit def is dead.
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MI->getOperand(3).setIsDead();
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Offset -= ThisVal;
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}
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}
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void SystemZRegisterInfo::emitPrologue(MachineFunction &MF) const {
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MachineBasicBlock &MBB = MF.front(); // Prolog goes in entry BB
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const TargetFrameInfo &TFI = *MF.getTarget().getFrameInfo();
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MachineFrameInfo *MFI = MF.getFrameInfo();
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SystemZMachineFunctionInfo *SystemZMFI =
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MF.getInfo<SystemZMachineFunctionInfo>();
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MachineBasicBlock::iterator MBBI = MBB.begin();
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DebugLoc DL = (MBBI != MBB.end() ? MBBI->getDebugLoc() :
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DebugLoc::getUnknownLoc());
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// Get the number of bytes to allocate from the FrameInfo.
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// Note that area for callee-saved stuff is already allocated, thus we need to
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// 'undo' the stack movement.
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uint64_t StackSize = MFI->getStackSize();
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StackSize -= SystemZMFI->getCalleeSavedFrameSize();
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uint64_t NumBytes = StackSize - TFI.getOffsetOfLocalArea();
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// Skip the callee-saved push instructions.
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while (MBBI != MBB.end() &&
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(MBBI->getOpcode() == SystemZ::MOV64mr ||
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MBBI->getOpcode() == SystemZ::MOV64mrm))
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++MBBI;
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if (MBBI != MBB.end())
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DL = MBBI->getDebugLoc();
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// adjust stack pointer: R15 -= numbytes
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if (StackSize || MFI->hasCalls()) {
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assert(MF.getRegInfo().isPhysRegUsed(SystemZ::R15D) &&
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"Invalid stack frame calculation!");
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emitSPUpdate(MBB, MBBI, -(int64_t)NumBytes, TII);
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}
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if (hasFP(MF)) {
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// Update R11 with the new base value...
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BuildMI(MBB, MBBI, DL, TII.get(SystemZ::MOV64rr), SystemZ::R11D)
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.addReg(SystemZ::R15D);
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// Mark the FramePtr as live-in in every block except the entry.
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for (MachineFunction::iterator I = llvm::next(MF.begin()), E = MF.end();
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I != E; ++I)
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I->addLiveIn(SystemZ::R11D);
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}
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}
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void SystemZRegisterInfo::emitEpilogue(MachineFunction &MF,
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MachineBasicBlock &MBB) const {
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const MachineFrameInfo *MFI = MF.getFrameInfo();
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const TargetFrameInfo &TFI = *MF.getTarget().getFrameInfo();
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MachineBasicBlock::iterator MBBI = prior(MBB.end());
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SystemZMachineFunctionInfo *SystemZMFI =
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MF.getInfo<SystemZMachineFunctionInfo>();
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unsigned RetOpcode = MBBI->getOpcode();
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switch (RetOpcode) {
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case SystemZ::RET: break; // These are ok
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default:
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assert(0 && "Can only insert epilog into returning blocks");
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}
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// Get the number of bytes to allocate from the FrameInfo
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// Note that area for callee-saved stuff is already allocated, thus we need to
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// 'undo' the stack movement.
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uint64_t StackSize =
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MFI->getStackSize() - SystemZMFI->getCalleeSavedFrameSize();
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uint64_t NumBytes = StackSize - TFI.getOffsetOfLocalArea();
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// Skip the final terminator instruction.
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while (MBBI != MBB.begin()) {
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MachineBasicBlock::iterator PI = prior(MBBI);
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--MBBI;
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if (!PI->getDesc().isTerminator())
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break;
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}
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// During callee-saved restores emission stack frame was not yet finialized
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// (and thus - the stack size was unknown). Tune the offset having full stack
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// size in hands.
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if (StackSize || MFI->hasCalls()) {
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assert((MBBI->getOpcode() == SystemZ::MOV64rmm ||
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MBBI->getOpcode() == SystemZ::MOV64rm) &&
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"Expected to see callee-save register restore code");
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assert(MF.getRegInfo().isPhysRegUsed(SystemZ::R15D) &&
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"Invalid stack frame calculation!");
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unsigned i = 0;
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MachineInstr &MI = *MBBI;
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while (!MI.getOperand(i).isImm()) {
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++i;
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assert(i < MI.getNumOperands() && "Unexpected restore code!");
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}
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uint64_t Offset = NumBytes + MI.getOperand(i).getImm();
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// If Offset does not fit into 20-bit signed displacement field we need to
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// emit some additional code...
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if (Offset > 524287) {
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// Fold the displacement into load instruction as much as possible.
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NumBytes = Offset - 524287;
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Offset = 524287;
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emitSPUpdate(MBB, MBBI, NumBytes, TII);
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}
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MI.getOperand(i).ChangeToImmediate(Offset);
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}
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}
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unsigned SystemZRegisterInfo::getRARegister() const {
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assert(0 && "What is the return address register");
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return 0;
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}
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unsigned
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SystemZRegisterInfo::getFrameRegister(const MachineFunction &MF) const {
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assert(0 && "What is the frame register");
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return 0;
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}
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unsigned SystemZRegisterInfo::getEHExceptionRegister() const {
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assert(0 && "What is the exception register");
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return 0;
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}
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unsigned SystemZRegisterInfo::getEHHandlerRegister() const {
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assert(0 && "What is the exception handler register");
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return 0;
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}
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int SystemZRegisterInfo::getDwarfRegNum(unsigned RegNum, bool isEH) const {
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assert(0 && "What is the dwarf register number");
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return -1;
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}
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#include "SystemZGenRegisterInfo.inc"
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