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This optimization merges the common part of a group of GEPs, so we can compute each pointer address by adding a simple offset to the common part. The optimization is currently only enabled for the NVPTX backend, where it has a large payoff on some benchmarks. Review: http://reviews.llvm.org/D3462 Patch by Jingyue Wu. llvm-svn: 207783
61 lines
2.5 KiB
LLVM
61 lines
2.5 KiB
LLVM
; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s --check-prefix=PTX
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; RUN: llc < %s -march=nvptx64 -mcpu=sm_20 | FileCheck %s --check-prefix=PTX
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; RUN: opt < %s -S -separate-const-offset-from-gep -gvn -dce | FileCheck %s --check-prefix=IR
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; Verifies the SeparateConstOffsetFromGEP pass.
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; The following code computes
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; *output = array[x][y] + array[x][y+1] + array[x+1][y] + array[x+1][y+1]
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;
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; We expect SeparateConstOffsetFromGEP to transform it to
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;
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; float *base = &a[x][y];
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; *output = base[0] + base[1] + base[32] + base[33];
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;
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; so the backend can emit PTX that uses fewer virtual registers.
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target datalayout = "e-i64:64-v16:16-v32:32-n16:32:64"
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target triple = "nvptx64-unknown-unknown"
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@array = internal addrspace(3) constant [32 x [32 x float]] zeroinitializer, align 4
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define void @sum_of_array(i32 %x, i32 %y, float* nocapture %output) {
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.preheader:
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%0 = zext i32 %y to i64
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%1 = zext i32 %x to i64
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%2 = getelementptr inbounds [32 x [32 x float]] addrspace(3)* @array, i64 0, i64 %1, i64 %0
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%3 = addrspacecast float addrspace(3)* %2 to float*
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%4 = load float* %3, align 4
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%5 = fadd float %4, 0.000000e+00
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%6 = add i32 %y, 1
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%7 = zext i32 %6 to i64
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%8 = getelementptr inbounds [32 x [32 x float]] addrspace(3)* @array, i64 0, i64 %1, i64 %7
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%9 = addrspacecast float addrspace(3)* %8 to float*
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%10 = load float* %9, align 4
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%11 = fadd float %5, %10
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%12 = add i32 %x, 1
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%13 = zext i32 %12 to i64
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%14 = getelementptr inbounds [32 x [32 x float]] addrspace(3)* @array, i64 0, i64 %13, i64 %0
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%15 = addrspacecast float addrspace(3)* %14 to float*
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%16 = load float* %15, align 4
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%17 = fadd float %11, %16
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%18 = getelementptr inbounds [32 x [32 x float]] addrspace(3)* @array, i64 0, i64 %13, i64 %7
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%19 = addrspacecast float addrspace(3)* %18 to float*
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%20 = load float* %19, align 4
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%21 = fadd float %17, %20
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store float %21, float* %output, align 4
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ret void
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}
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; PTX-LABEL: sum_of_array(
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; PTX: ld.shared.f32 {{%f[0-9]+}}, {{\[}}[[BASE_REG:%(rl|r)[0-9]+]]{{\]}}
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; PTX: ld.shared.f32 {{%f[0-9]+}}, {{\[}}[[BASE_REG]]+4{{\]}}
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; PTX: ld.shared.f32 {{%f[0-9]+}}, {{\[}}[[BASE_REG]]+128{{\]}}
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; PTX: ld.shared.f32 {{%f[0-9]+}}, {{\[}}[[BASE_REG]]+132{{\]}}
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; IR-LABEL: @sum_of_array(
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; IR: [[BASE_PTR:%[0-9]+]] = getelementptr inbounds [32 x [32 x float]] addrspace(3)* @array, i64 0, i32 %x, i32 %y
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; IR: [[BASE_INT:%[0-9]+]] = ptrtoint float addrspace(3)* [[BASE_PTR]] to i64
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; IR: %5 = add i64 [[BASE_INT]], 4
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; IR: %10 = add i64 [[BASE_INT]], 128
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; IR: %15 = add i64 [[BASE_INT]], 132
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