Matt Arsenault 93f691bf87 AMDGPU: Enable integer division bypass ... We probably want this, and I've meant to turn this on for a long time. SC actually emits a special case to early-out for a 1 denominator, which perhaps should also be considered.		2020-02-19 17:50:19 -05:00
..
AArch64	Revert "[PatternMatch] Match XOR variant of unsigned-add overflow check."	2020-02-19 19:37:08 +01:00
AMDGPU	AMDGPU: Enable integer division bypass	2020-02-19 17:50:19 -05:00
ARC
ARM	Reland "[DebugInfo] Enable the debug entry values feature by default"	2020-02-19 11:12:26 +01:00
AVR
BPF
Generic
Hexagon	[Hexagon] Change HVX vector predicate types from v512/1024i1 to v64/128i1	2020-02-19 14:14:56 -06:00
Inputs
Lanai
Mips	[MIPS GlobalISel] Legalize non-power-of-2 and unaligned load and store	2020-02-19 12:02:27 +01:00
MIR	Reland "[DebugInfo] Enable the debug entry values feature by default"	2020-02-19 11:12:26 +01:00
MSP430
NVPTX
PowerPC
RISCV	[RISCV] Implement mayBeEmittedAsTailCall for tail call optimization	2020-02-18 23:56:42 +08:00
SPARC
SystemZ	[ValueTracking] Improve isKnownNonNaN() to recognize zero splats.	2020-02-19 09:35:36 -08:00
Thumb	Use SETNE directly rather than SUB/SETNE 0 for stack guard check	2020-02-18 13:21:26 +00:00
Thumb2	[ARM,MVE] Fix predicate types of some intrinsics	2020-02-19 16:24:54 +00:00
VE	[VE] TLS codegen	2020-02-18 16:09:12 +01:00
WebAssembly	[WebAssembly] Replace all calls with generalized multivalue calls	2020-02-18 15:55:20 -08:00
WinCFGuard
WinEH
X86	[x86] add test for uint->fp with unsafe-fp-math (PR43609); NFC	2020-02-19 15:18:52 -05:00
XCore