Peter Collingbourne 4385b79373 AArch64: Add a tagged-globals backend feature. ... This feature instructs the backend to allow locally defined global variable addresses to contain a pointer tag in bits 56-63 that will be ignored by the hardware (i.e. TBI), but may be used by an instrumentation pass such as HWASAN. It works by adding a MOVK instruction to the regular ADRP/ADD sequence that sets bits 48-63 to the corresponding bits of the global, with the linker bounds check disabled on the ADRP instruction to prevent the tag from causing a link failure. This implementation of the feature omits the MOVK when loading from or storing to a global, which is sufficient for TBI. If the same approach is extended to MTE, assuming that 0 is not configured as a catch-all tag, we will most likely also need the MOVK in this case in order to avoid a tag mismatch. Differential Revision: https://reviews.llvm.org/D65364 llvm-svn: 367475		2019-07-31 20:14:19 +00:00
..
AArch64BaseInfo.cpp	Update the file headers across all of the LLVM projects in the monorepo	2019-01-19 08:50:56 +00:00
AArch64BaseInfo.h	AArch64: Add a tagged-globals backend feature.	2019-07-31 20:14:19 +00:00
CMakeLists.txt
LLVMBuild.txt	Update the file headers across all of the LLVM projects in the monorepo	2019-01-19 08:50:56 +00:00