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derived classes. Since global data alignment, layout, and mangling is often based on the DataLayout, move it to the TargetMachine. This ensures that global data is going to be layed out and mangled consistently if the subtarget changes on a per function basis. Prior to this all targets(*) have had subtarget dependent code moved out and onto the TargetMachine. *One target hasn't been migrated as part of this change: R600. The R600 port has, as a subtarget feature, the size of pointers and this affects global data layout. I've currently hacked in a FIXME to enable progress, but the port needs to be updated to either pass the 64-bitness to the TargetMachine, or fix the DataLayout to avoid subtarget dependent features. llvm-svn: 227113
77 lines
2.5 KiB
C++
77 lines
2.5 KiB
C++
//===-- AMDGPUTargetMachine.h - AMDGPU TargetMachine Interface --*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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/// \file
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/// \brief The AMDGPU TargetMachine interface definition for hw codgen targets.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_R600_AMDGPUTARGETMACHINE_H
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#define LLVM_LIB_TARGET_R600_AMDGPUTARGETMACHINE_H
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#include "AMDGPUFrameLowering.h"
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#include "AMDGPUInstrInfo.h"
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#include "AMDGPUIntrinsicInfo.h"
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#include "AMDGPUSubtarget.h"
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#include "R600ISelLowering.h"
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#include "llvm/IR/DataLayout.h"
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namespace llvm {
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//===----------------------------------------------------------------------===//
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// AMDGPU Target Machine (R600+)
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//===----------------------------------------------------------------------===//
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class AMDGPUTargetMachine : public LLVMTargetMachine {
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protected:
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TargetLoweringObjectFile *TLOF;
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AMDGPUSubtarget Subtarget;
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AMDGPUIntrinsicInfo IntrinsicInfo;
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public:
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AMDGPUTargetMachine(const Target &T, StringRef TT, StringRef FS,
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StringRef CPU, TargetOptions Options, Reloc::Model RM,
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CodeModel::Model CM, CodeGenOpt::Level OL);
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~AMDGPUTargetMachine();
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// FIXME: This is currently broken, the DataLayout needs to move to
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// the target machine.
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const DataLayout *getDataLayout() const override {
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return getSubtargetImpl()->getDataLayout();
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}
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const AMDGPUSubtarget *getSubtargetImpl() const override {
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return &Subtarget;
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}
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const AMDGPUIntrinsicInfo *getIntrinsicInfo() const override {
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return &IntrinsicInfo;
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}
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TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
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/// \brief Register R600 analysis passes with a pass manager.
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void addAnalysisPasses(PassManagerBase &PM) override;
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TargetLoweringObjectFile *getObjFileLowering() const override {
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return TLOF;
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}
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};
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//===----------------------------------------------------------------------===//
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// GCN Target Machine (SI+)
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//===----------------------------------------------------------------------===//
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class GCNTargetMachine : public AMDGPUTargetMachine {
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public:
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GCNTargetMachine(const Target &T, StringRef TT, StringRef FS,
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StringRef CPU, TargetOptions Options, Reloc::Model RM,
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CodeModel::Model CM, CodeGenOpt::Level OL);
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};
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} // End namespace llvm
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#endif
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