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138541b335
When running the tests on PowerPC and x86, the lit test GlobalISel/trunc.ll fails at the memory sanitize step. This seems to be due to wrong invalid logic (which matches even if it shouldn't) and likely missing variable initialisation." Reviewed By: arsenm Differential Revision: https://reviews.llvm.org/D95878
70 lines
3.2 KiB
TableGen
70 lines
3.2 KiB
TableGen
//=- AMDGPUCombine.td - Define AMDGPU Combine Rules ----------*- tablegen -*-=//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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include "llvm/Target/GlobalISel/Combine.td"
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// TODO: This really belongs after legalization after scalarization.
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// TODO: GICombineRules should accept subtarget predicates
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def fmin_fmax_legacy_matchdata : GIDefMatchData<"AMDGPUPostLegalizerCombinerHelper::FMinFMaxLegacyInfo">;
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def fcmp_select_to_fmin_fmax_legacy : GICombineRule<
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(defs root:$select, fmin_fmax_legacy_matchdata:$matchinfo),
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(match (wip_match_opcode G_SELECT):$select,
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[{ return PostLegalizerHelper.matchFMinFMaxLegacy(*${select}, ${matchinfo}); }]),
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(apply [{ PostLegalizerHelper.applySelectFCmpToFMinToFMaxLegacy(*${select}, ${matchinfo}); }])>;
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def uchar_to_float : GICombineRule<
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(defs root:$itofp),
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(match (wip_match_opcode G_UITOFP, G_SITOFP):$itofp,
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[{ return PostLegalizerHelper.matchUCharToFloat(*${itofp}); }]),
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(apply [{ PostLegalizerHelper.applyUCharToFloat(*${itofp}); }])>;
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def cvt_f32_ubyteN_matchdata : GIDefMatchData<"AMDGPUPostLegalizerCombinerHelper::CvtF32UByteMatchInfo">;
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def cvt_f32_ubyteN : GICombineRule<
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(defs root:$cvt_f32_ubyteN, cvt_f32_ubyteN_matchdata:$matchinfo),
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(match (wip_match_opcode G_AMDGPU_CVT_F32_UBYTE0,
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G_AMDGPU_CVT_F32_UBYTE1,
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G_AMDGPU_CVT_F32_UBYTE2,
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G_AMDGPU_CVT_F32_UBYTE3):$cvt_f32_ubyteN,
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[{ return PostLegalizerHelper.matchCvtF32UByteN(*${cvt_f32_ubyteN}, ${matchinfo}); }]),
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(apply [{ PostLegalizerHelper.applyCvtF32UByteN(*${cvt_f32_ubyteN}, ${matchinfo}); }])>;
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def clamp_i64_to_i16_matchdata : GIDefMatchData<"AMDGPUPreLegalizerCombinerHelper::ClampI64ToI16MatchInfo">;
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def clamp_i64_to_i16 : GICombineRule<
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(defs root:$clamp_i64_to_i16, clamp_i64_to_i16_matchdata:$matchinfo),
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(match (wip_match_opcode G_TRUNC):$clamp_i64_to_i16,
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[{ return PreLegalizerHelper.matchClampI64ToI16(*${clamp_i64_to_i16}, MRI, *MF, ${matchinfo}); }]),
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(apply [{ PreLegalizerHelper.applyClampI64ToI16(*${clamp_i64_to_i16}, ${matchinfo}); }])>;
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// Combines which should only apply on SI/VI
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def gfx6gfx7_combines : GICombineGroup<[fcmp_select_to_fmin_fmax_legacy]>;
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def AMDGPUPreLegalizerCombinerHelper: GICombinerHelper<
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"AMDGPUGenPreLegalizerCombinerHelper", [all_combines, clamp_i64_to_i16]> {
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let DisableRuleOption = "amdgpuprelegalizercombiner-disable-rule";
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let StateClass = "AMDGPUPreLegalizerCombinerHelperState";
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}
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def AMDGPUPostLegalizerCombinerHelper: GICombinerHelper<
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"AMDGPUGenPostLegalizerCombinerHelper",
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[all_combines, gfx6gfx7_combines,
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uchar_to_float, cvt_f32_ubyteN]> {
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let DisableRuleOption = "amdgpupostlegalizercombiner-disable-rule";
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let StateClass = "AMDGPUPostLegalizerCombinerHelperState";
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let AdditionalArguments = [];
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}
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def AMDGPURegBankCombinerHelper : GICombinerHelper<
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"AMDGPUGenRegBankCombinerHelper", []> {
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let DisableRuleOption = "amdgpuregbankcombiner-disable-rule";
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}
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