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ee6566c72b
The algorithm here only works if the sint_to_fp doesn't do any rounding. Otherwise it can round before the offset fixup is applied. Add an assert to protect this. To avoid breaking the one test in tree that tested this code with a set of types that fail the assert, I've enabled i32->f32 to use the i64->f32 algorithm. This only occurs when f64 isn't a legal type. If f64 is legal then we do i32->f64->f32 instead. Differential Revision: https://reviews.llvm.org/D72794
33 lines
1012 B
LLVM
33 lines
1012 B
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -march=mips -mattr=+single-float < %s | FileCheck %s
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define void @f0() nounwind {
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; CHECK-LABEL: f0:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: addiu $sp, $sp, -8
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; CHECK-NEXT: addiu $1, $zero, 1
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; CHECK-NEXT: sw $1, 4($sp)
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; CHECK-NEXT: lw $1, 4($sp)
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; CHECK-NEXT: srl $2, $1, 1
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; CHECK-NEXT: andi $3, $1, 1
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; CHECK-NEXT: or $2, $3, $2
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; CHECK-NEXT: mtc1 $2, $f0
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; CHECK-NEXT: cvt.s.w $f0, $f0
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; CHECK-NEXT: add.s $f0, $f0, $f0
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; CHECK-NEXT: mtc1 $1, $f1
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; CHECK-NEXT: cvt.s.w $f1, $f1
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; CHECK-NEXT: slti $1, $1, 0
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; CHECK-NEXT: movn.s $f1, $f0, $1
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; CHECK-NEXT: swc1 $f1, 0($sp)
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; CHECK-NEXT: jr $ra
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; CHECK-NEXT: addiu $sp, $sp, 8
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entry:
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%b = alloca i32, align 4
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%a = alloca float, align 4
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store volatile i32 1, i32* %b, align 4
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%0 = load volatile i32, i32* %b, align 4
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%conv = uitofp i32 %0 to float
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store float %conv, float* %a, align 4
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ret void
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}
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