Misha Brukman 2de19586d6 * Removed unused classes: the rd field is always mentioned as the last reg. ... * Added new classes which start building from rs1, adding rs2, and then rd. * Fixed order of operands in classes 3.11, 3.12, 3.16, and 3.17 . * Fixed comments to reflect Real Life (tm). * Removed "don't care" commented out assignments and dead classes (#if 0). llvm-svn: 6560		2003-06-03 01:11:58 +00:00
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Sparc	* Removed unused classes: the rd field is always mentioned as the last reg.	2003-06-03 01:11:58 +00:00
X86	Eliminated a compiler warning due to casting to a different-sized datatype.	2003-06-02 04:13:58 +00:00
Makefile	X86 target builds fine now	2002-11-20 20:17:03 +00:00
MRegisterInfo.cpp	Capture more information in ctor	2002-12-28 20:34:18 +00:00
Target.td	Added the target-independent part of TableGen data.	2003-05-29 18:48:17 +00:00
TargetData.cpp	Minor cleanups	2003-06-02 05:21:06 +00:00
TargetInstrInfo.cpp	Rename MachineInstrInfo -> TargetInstrInfo	2003-01-14 22:00:31 +00:00
TargetMachine.cpp	The promotion rules are the same for all targets, they are set by the C standard.	2003-04-26 19:47:36 +00:00
TargetSchedInfo.cpp	More renamings of Target/Machine*Info to Target/Target*Info	2002-12-29 03:13:05 +00:00