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6a9ec7e80e
Remove explicit casts to std::string now that there is no overload resolution issues in the TargetData ctors. llvm-svn: 28830
146 lines
4.8 KiB
C++
146 lines
4.8 KiB
C++
//===-- IA64TargetMachine.cpp - Define TargetMachine for IA64 -------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by Duraid Madina and is distributed under the
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// University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines the IA64 specific subclass of TargetMachine.
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//
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//===----------------------------------------------------------------------===//
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#include "IA64TargetMachine.h"
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#include "IA64.h"
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#include "llvm/Module.h"
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#include "llvm/PassManager.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/Target/TargetOptions.h"
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#include "llvm/Target/TargetMachineRegistry.h"
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#include "llvm/Transforms/Scalar.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/ADT/Statistic.h"
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#include <iostream>
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using namespace llvm;
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/// IA64TargetMachineModule - Note that this is used on hosts that cannot link
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/// in a library unless there are references into the library. In particular,
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/// it seems that it is not possible to get things to work on Win32 without
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/// this. Though it is unused, do not remove it.
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extern "C" int IA64TargetMachineModule;
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int IA64TargetMachineModule = 0;
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namespace {
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cl::opt<bool> DisableOutput("disable-ia64-llc-output", cl::Hidden,
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cl::desc("Disable the IA64 asm printer, for use "
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"when profiling the code generator."));
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cl::opt<bool> EnableDAGIsel("enable-ia64-dag-isel", cl::Hidden,
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cl::desc("Enable the IA64 DAG->DAG isel"));
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// Register the target.
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RegisterTarget<IA64TargetMachine> X("ia64", " IA-64 (Itanium)");
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}
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unsigned IA64TargetMachine::compileTimeMatchQuality() {
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#if defined(__ia64__) || defined(__IA64__)
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return 50;
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#else
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return 0;
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#endif
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}
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unsigned IA64TargetMachine::getModuleMatchQuality(const Module &M) {
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// we match [iI][aA]*64
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bool seenIA64=false;
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std::string TT = M.getTargetTriple();
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if (TT.size() >= 4) {
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if( (TT[0]=='i' || TT[0]=='I') &&
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(TT[1]=='a' || TT[1]=='A') ) {
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for(unsigned int i=2; i<(TT.size()-1); i++)
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if(TT[i]=='6' && TT[i+1]=='4')
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seenIA64=true;
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}
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if(seenIA64)
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return 50; // strong match
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}
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return compileTimeMatchQuality()/2;
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}
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/// IA64TargetMachine ctor - Create an LP64 architecture model
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///
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IA64TargetMachine::IA64TargetMachine(const Module &M, const std::string &FS)
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: TargetMachine("IA64"), DataLayout("e"),
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FrameInfo(TargetFrameInfo::StackGrowsDown, 16, 0),
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TLInfo(*this) { // FIXME? check this stuff
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}
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// addPassesToEmitFile - We currently use all of the same passes as the JIT
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// does to emit statically compiled machine code.
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bool IA64TargetMachine::addPassesToEmitFile(PassManager &PM,
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std::ostream &Out,
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CodeGenFileType FileType,
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bool Fast) {
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if (FileType != TargetMachine::AssemblyFile) return true;
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// FIXME: Implement efficient support for garbage collection intrinsics.
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PM.add(createLowerGCPass());
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// FIXME: Implement the invoke/unwind instructions!
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PM.add(createLowerInvokePass(704, 16)); // on ia64 linux, jmpbufs are 704
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// bytes and must be 16byte aligned
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// Make sure that no unreachable blocks are instruction selected.
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PM.add(createUnreachableBlockEliminationPass());
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// Add an instruction selector
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// FIXME: reap this option one day: if(EnableDAGIsel)
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PM.add(createIA64DAGToDAGInstructionSelector(*this));
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/* XXX not yet. ;)
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// Run optional SSA-based machine code optimizations next...
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if (!NoSSAPeephole)
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PM.add(createIA64SSAPeepholeOptimizerPass());
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*/
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// Print the instruction selected machine code...
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if (PrintMachineCode)
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PM.add(createMachineFunctionPrinterPass(&std::cerr));
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// Perform register allocation to convert to a concrete IA64 representation
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PM.add(createRegisterAllocator());
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if (PrintMachineCode)
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PM.add(createMachineFunctionPrinterPass(&std::cerr));
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if (PrintMachineCode)
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PM.add(createMachineFunctionPrinterPass(&std::cerr));
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// Insert prolog/epilog code. Eliminate abstract frame index references...
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PM.add(createPrologEpilogCodeInserter());
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/* XXX no, not just yet */
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// PM.add(createIA64PeepholeOptimizerPass());
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// Make sure everything is bundled happily
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PM.add(createIA64BundlingPass(*this));
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if (PrintMachineCode) // Print the register-allocated code
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PM.add(createIA64CodePrinterPass(std::cerr, *this));
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if (!DisableOutput)
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PM.add(createIA64CodePrinterPass(Out, *this));
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// Delete machine code for this function
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PM.add(createMachineCodeDeleter());
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return false; // success!
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}
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