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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-25 20:23:11 +01:00
llvm-mirror/lib/Target/AVR
Ayke van Laethem 8bab8a2bd7 [AVR] Only support sp, r0 and r1 in llvm.read_register
Most other registers are allocatable and therefore cannot be used.

This issue was flagged by the machine verifier, because reading other
registers is considered reading from an undefined register.

Differential Revision: https://reviews.llvm.org/D96969
2021-07-24 14:03:27 +02:00
..
AsmParser
Disassembler
MCTargetDesc
TargetInfo
AVR.h [AVR] Expand large shifts early in IR 2021-07-24 14:03:26 +02:00
AVR.td
AVRAsmPrinter.cpp
AVRCallingConv.td
AVRDevices.td
AVRExpandPseudoInsts.cpp [AVR] Fix rotate instructions 2021-07-24 14:03:26 +02:00
AVRFrameLowering.cpp [AVR] Fix a bug in prologue of ISR 2021-06-29 21:44:50 +08:00
AVRFrameLowering.h
AVRInstrFormats.td
AVRInstrInfo.cpp
AVRInstrInfo.h
AVRInstrInfo.td [AVR] Fix rotate instructions 2021-07-24 14:03:26 +02:00
AVRISelDAGToDAG.cpp
AVRISelLowering.cpp [AVR] Only support sp, r0 and r1 in llvm.read_register 2021-07-24 14:03:27 +02:00
AVRISelLowering.h [AVR][NFC] Refactor 8-bit & 16-bit shifts 2021-05-31 10:30:46 +08:00
AVRMachineFunctionInfo.h
AVRMCInstLower.cpp
AVRMCInstLower.h
AVRRegisterInfo.cpp
AVRRegisterInfo.h
AVRRegisterInfo.td
AVRRelaxMemOperations.cpp
AVRSelectionDAGInfo.h
AVRShiftExpand.cpp [AVR] Expand large shifts early in IR 2021-07-24 14:03:26 +02:00
AVRSubtarget.cpp
AVRSubtarget.h
AVRTargetMachine.cpp [AVR] Expand large shifts early in IR 2021-07-24 14:03:26 +02:00
AVRTargetMachine.h
AVRTargetObjectFile.cpp
AVRTargetObjectFile.h
CMakeLists.txt [AVR] Expand large shifts early in IR 2021-07-24 14:03:26 +02:00
README.md
TODO.md

AVR backend

This experimental backend is for the 8-bit Atmel AVR microcontroller.