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llvm-mirror/lib/Target/MSP430/MSP430TargetMachine.cpp
David Green 76448ad394 [Targets] Add errors for tiny and kernel codemodel on targets that don't support them
Adds fatal errors for any target that does not support the Tiny or Kernel
codemodels by rejigging the getEffectiveCodeModel calls.

Differential Revision: https://reviews.llvm.org/D50141

llvm-svn: 348585
2018-12-07 12:10:23 +00:00

86 lines
2.9 KiB
C++

//===-- MSP430TargetMachine.cpp - Define TargetMachine for MSP430 ---------===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// Top-level implementation for the MSP430 target.
//
//===----------------------------------------------------------------------===//
#include "MSP430TargetMachine.h"
#include "MSP430.h"
#include "llvm/CodeGen/Passes.h"
#include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"
#include "llvm/CodeGen/TargetPassConfig.h"
#include "llvm/IR/LegacyPassManager.h"
#include "llvm/MC/MCAsmInfo.h"
#include "llvm/Support/TargetRegistry.h"
using namespace llvm;
extern "C" void LLVMInitializeMSP430Target() {
// Register the target.
RegisterTargetMachine<MSP430TargetMachine> X(getTheMSP430Target());
}
static Reloc::Model getEffectiveRelocModel(Optional<Reloc::Model> RM) {
if (!RM.hasValue())
return Reloc::Static;
return *RM;
}
static std::string computeDataLayout(const Triple &TT, StringRef CPU,
const TargetOptions &Options) {
return "e-m:e-p:16:16-i32:16-i64:16-f32:16-f64:16-a:8-n8:16-S16";
}
MSP430TargetMachine::MSP430TargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS,
const TargetOptions &Options,
Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT)
: LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options), TT, CPU, FS,
Options, getEffectiveRelocModel(RM),
getEffectiveCodeModel(CM, CodeModel::Small), OL),
TLOF(make_unique<TargetLoweringObjectFileELF>()),
Subtarget(TT, CPU, FS, *this) {
initAsmInfo();
}
MSP430TargetMachine::~MSP430TargetMachine() {}
namespace {
/// MSP430 Code Generator Pass Configuration Options.
class MSP430PassConfig : public TargetPassConfig {
public:
MSP430PassConfig(MSP430TargetMachine &TM, PassManagerBase &PM)
: TargetPassConfig(TM, PM) {}
MSP430TargetMachine &getMSP430TargetMachine() const {
return getTM<MSP430TargetMachine>();
}
bool addInstSelector() override;
void addPreEmitPass() override;
};
} // namespace
TargetPassConfig *MSP430TargetMachine::createPassConfig(PassManagerBase &PM) {
return new MSP430PassConfig(*this, PM);
}
bool MSP430PassConfig::addInstSelector() {
// Install an instruction selector.
addPass(createMSP430ISelDag(getMSP430TargetMachine(), getOptLevel()));
return false;
}
void MSP430PassConfig::addPreEmitPass() {
// Must run branch selection immediately preceding the asm printer.
addPass(createMSP430BranchSelectionPass(), false);
}