Simon Dardis 2e9a461206 [inlineasm] Propagate operand constraints to the backend ... When SelectionDAGISel transforms a node representing an inline asm block, memory constraint information is not preserved. This can cause constraints to be broken when a memory offset is of the form: offset + frame index when the frame is resolved. By propagating the constraints all the way to the backend, targets can enforce memory operands of inline assembly to conform to their constraints. For MIPSR6, some instructions had their offsets reduced to 9 bits from 16 bits such as ll/sc. This becomes problematic when using inline assembly to perform atomic operations, as an offset can generated that is too big to encode in the instruction. Reviewers: dsanders, vkalintris Differential Review: https://reviews.llvm.org/D21615 llvm-svn: 275786		2016-07-18 13:17:31 +00:00
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AArch64	Disable this-return argument forwarding on ARM/AArch64	2016-07-16 07:07:29 +00:00
AMDGPU	AMDGPU: Disable AMDGPUPromoteAlloca pass for shader calling conventions.	2016-07-18 09:02:47 +00:00
ARM	[ARM] Update test to use CHECK-LABEL. NFCI.	2016-07-18 07:48:42 +00:00
BPF
Generic
Hexagon	[Hexagon] Improve patterns with stack-based addressing	2016-07-15 15:35:52 +00:00
Inputs
Lanai
Mips	[inlineasm] Propagate operand constraints to the backend	2016-07-18 13:17:31 +00:00
MIR	llc: Add support for -run-pass none	2016-07-16 02:24:59 +00:00
MSP430
NVPTX
PowerPC
SPARC
SystemZ
Thumb	[Thumb-1] Select post-increment load and store where possible	2016-07-15 08:03:56 +00:00
Thumb2
WebAssembly
WinEH
X86	[AVX512] Add EVEX versions of scalar ADD/SUB/MUL/DIV to load folding tables.	2016-07-18 06:49:32 +00:00
XCore