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908ef3f208
Currently custom code predicates can only really be used for contextless checks tied to a single instruction (e.g. check the def for hasOneUse). If you do want to inspect the input instructions in the source pattern, you cannot without re-verifying the opcode and type checks implied by the patterns, since this check was emitted before any operand constraints. Really, these are pattern level predicates that implicitly depend on the instruction and operand checks. Introduce a filtering function so the custom predicate is emitted last. I'm not sure this is the most elegant solution. It seems like this is really a different thing from the InstructionMatcher/IPM_ predicate kinds. I initially tried keeping this in a separate predicate list, but that also seemed awkward. This only half fixes the problem I'm trying to solve. The AMDGPU pattern I'm attempting to port also uses the PredicateCodeUsesOperands feature to allow checks on the source operands when the input pattern is commuted. Really the emitter should reject the pattern since it doesn't handle this case, but at this point it would be more productive to just implement this.
36 lines
1.6 KiB
TableGen
36 lines
1.6 KiB
TableGen
// RUN: llvm-tblgen -gen-global-isel -I %p/../../include -I %p/Common %s -o - | FileCheck %s
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// Boilerplate code.
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include "llvm/Target/Target.td"
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include "GlobalISelEmitterCommon.td"
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let TargetPrefix = "mytarget" in {
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def int_mytarget_anyptr : Intrinsic<[llvm_i32_ty], [llvm_anyptr_ty]>;
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}
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// Ensure that llvm_anyptr_ty on an intrinsic results in a
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// GIM_CheckPointerToAny rather than a GIM_CheckType.
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//
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// CHECK: GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::mytarget_anyptr,
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// CHECK-NEXT: GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
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// CHECK-NEXT: GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/MyTarget::GPR32RegClassID,
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// CHECK-NEXT: // MIs[0] src
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// CHECK-NEXT: GIM_CheckPointerToAny, /*MI*/0, /*Op*/2, /*SizeInBits*/32,
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// CHECK-NEXT: GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/MyTarget::GPR32RegClassID,
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// CHECK-NEXT: GIM_CheckCxxInsnPredicate, /*MI*/0, /*FnId*/GIPFP_MI_Predicate_frag_anyptr,
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// CHECK-NEXT: // (intrinsic_w_chain:{ *:[i32] } {{[0-9]+}}:{ *:[iPTR] }, GPR32:{ *:[i32] }:$src)<<P:Predicate_frag_anyptr>> => (ANYLOAD:{ *:[i32] } GPR32:{ *:[i32] }:$src)
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// CHECK-NEXT: GIR_BuildMI, /*InsnID*/0, /*Opcode*/MyTarget::ANYLOAD,
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let hasSideEffects = 1 in {
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def ANYLOAD : I<(outs GPR32:$dst), (ins GPR32:$src1),
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[(set GPR32:$dst, (load GPR32:$src1))]>;
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}
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def frag_anyptr : PatFrag<(ops node:$src),
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(int_mytarget_anyptr node:$src),
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[{ return true; // C++ code }]> {
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let GISelPredicateCode = [{ return true; // C++ code }];
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}
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def : Pat<(frag_anyptr GPR32:$src),
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(p0 (ANYLOAD GPR32:$src))>;
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