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llvm-mirror/test/CodeGen/X86/trunc-ext-ld-st.ll
Stephen Lin 798e242090 Update to more CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change.
All changes were made by the following bash script:

  find test/CodeGen -name "*.ll" | \
  while read NAME; do
    echo "$NAME"
    grep -q "^; *RUN: *llc.*debug" $NAME && continue
    grep -q "^; *RUN:.*llvm-objdump" $NAME && continue
    grep -q "^; *RUN: *opt.*" $NAME && continue
    TEMP=`mktemp -t temp`
    cp $NAME $TEMP
    sed -n "s/^define [^@]*@\([A-Za-z0-9_]*\)(.*$/\1/p" < $NAME | \
    while read FUNC; do
      sed -i '' "s/;\([A-Za-z0-9_-]*\)\([A-Za-z0-9_-]*\):\( *\)$FUNC[:]* *\$/;\1\2-LABEL:\3$FUNC:/g" $TEMP
    done
    sed -i '' "s/;\(.*\)-LABEL-LABEL:/;\1-LABEL:/" $TEMP
    sed -i '' "s/;\(.*\)-NEXT-LABEL:/;\1-NEXT:/" $TEMP
    sed -i '' "s/;\(.*\)-NOT-LABEL:/;\1-NOT:/" $TEMP
    sed -i '' "s/;\(.*\)-DAG-LABEL:/;\1-DAG:/" $TEMP
    mv $TEMP $NAME
  done

This script catches a superset of the cases caught by the script associated with commit r186280. It initially found some false positives due to unusual constructs in a minority of tests; all such cases were disambiguated first in commit r186621.

llvm-svn: 186624
2013-07-18 22:47:09 +00:00

80 lines
1.6 KiB
LLVM

; RUN: llc < %s -march=x86-64 -mcpu=corei7 -mattr=+sse41 | FileCheck %s
;CHECK-LABEL: load_2_i8:
; A single 16-bit load
;CHECK: pmovzxbq
;CHECK: paddq
;CHECK: pshufb
; A single 16-bit store
;CHECK: movw
;CHECK: ret
define void @load_2_i8(<2 x i8>* %A) {
%T = load <2 x i8>* %A
%G = add <2 x i8> %T, <i8 9, i8 7>
store <2 x i8> %G, <2 x i8>* %A
ret void
}
;CHECK-LABEL: load_2_i16:
; Read 32-bits
;CHECK: pmovzxwq
;CHECK: paddq
;CHECK: pshufb
;CHECK: movd
;CHECK: ret
define void @load_2_i16(<2 x i16>* %A) {
%T = load <2 x i16>* %A
%G = add <2 x i16> %T, <i16 9, i16 7>
store <2 x i16> %G, <2 x i16>* %A
ret void
}
;CHECK-LABEL: load_2_i32:
;CHECK: pmovzxdq
;CHECK: paddq
;CHECK: pshufd
;CHECK: ret
define void @load_2_i32(<2 x i32>* %A) {
%T = load <2 x i32>* %A
%G = add <2 x i32> %T, <i32 9, i32 7>
store <2 x i32> %G, <2 x i32>* %A
ret void
}
;CHECK-LABEL: load_4_i8:
;CHECK: pmovzxbd
;CHECK: paddd
;CHECK: pshufb
;CHECK: ret
define void @load_4_i8(<4 x i8>* %A) {
%T = load <4 x i8>* %A
%G = add <4 x i8> %T, <i8 1, i8 4, i8 9, i8 7>
store <4 x i8> %G, <4 x i8>* %A
ret void
}
;CHECK-LABEL: load_4_i16:
;CHECK: pmovzxwd
;CHECK: paddd
;CHECK: pshufb
;CHECK: ret
define void @load_4_i16(<4 x i16>* %A) {
%T = load <4 x i16>* %A
%G = add <4 x i16> %T, <i16 1, i16 4, i16 9, i16 7>
store <4 x i16> %G, <4 x i16>* %A
ret void
}
;CHECK-LABEL: load_8_i8:
;CHECK: pmovzxbw
;CHECK: paddw
;CHECK: pshufb
;CHECK: ret
define void @load_8_i8(<8 x i8>* %A) {
%T = load <8 x i8>* %A
%G = add <8 x i8> %T, %T
store <8 x i8> %G, <8 x i8>* %A
ret void
}