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1dcd9f1f31
This patch add the ISD::LRINT and ISD::LLRINT along with new intrinsics. The changes are straightforward as for other floating-point rounding functions, with just some adjustments required to handle the return value being an interger. The idea is to optimize lrint/llrint generation for AArch64 in a subsequent patch. Current semantic is just route it to libm symbol. Reviewed By: craig.topper Differential Revision: https://reviews.llvm.org/D62017 llvm-svn: 361875
26 lines
772 B
LLVM
26 lines
772 B
LLVM
; RUN: llc < %s -mtriple=arm-eabi -float-abi=soft | FileCheck %s --check-prefix=SOFTFP
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; RUN: llc < %s -mtriple=arm-eabi -float-abi=hard | FileCheck %s --check-prefix=HARDFP
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; SOFTFP-LABEL: testmsxs_builtin:
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; SOFTFP: bl llrintf
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; HARDFP-LABEL: testmsxs_builtin:
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; HARDFP: bl llrintf
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define i64 @testmsxs_builtin(float %x) {
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entry:
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%0 = tail call i64 @llvm.llrint.f32(float %x)
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ret i64 %0
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}
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; SOFTFP-LABEL: testmsxd_builtin:
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; SOFTFP: bl llrint
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; HARDFP-LABEL: testmsxd_builtin:
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; HARDFP: bl llrint
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define i64 @testmsxd_builtin(double %x) {
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entry:
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%0 = tail call i64 @llvm.llrint.f64(double %x)
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ret i64 %0
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}
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declare i64 @llvm.llrint.f32(float) nounwind readnone
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declare i64 @llvm.llrint.f64(double) nounwind readnone
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