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188600d04d
Summary: This "pass" eagerly creates div and rem instructions even when only one is needed -- it relies on a later pass (machine DCE?) to clean them up. This is problematic not just from a cleanliness perspective (this pass is running during CodeGenPrepare, so should leave the IR in a better state), but it also creates a problem for instruction selection. If we always have a div+rem, isel will always select a divrem instruction (if possible), even when a single div or rem would do. Specifically, in NVPTX, we want to compute rem from the output of div, if available. But if a div is not available, we want to leave the rem alone. This transformation is overeager if div is always available. Because this code runs as part of CodeGenPrepare, it's nontrivial to write a test for this change. But this will effectively be tested by a later patch which adds the aforementioned change to NVPTX isel. Reviewers: tra Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D26088 llvm-svn: 285460
259 lines
9.6 KiB
C++
259 lines
9.6 KiB
C++
//===-- BypassSlowDivision.cpp - Bypass slow division ---------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains an optimization for div and rem on architectures that
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// execute short instructions significantly faster than longer instructions.
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// For example, on Intel Atom 32-bit divides are slow enough that during
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// runtime it is profitable to check the value of the operands, and if they are
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// positive and less than 256 use an unsigned 8-bit divide.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/Transforms/Utils/BypassSlowDivision.h"
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#include "llvm/ADT/DenseMap.h"
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#include "llvm/IR/Function.h"
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#include "llvm/IR/IRBuilder.h"
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#include "llvm/IR/Instructions.h"
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#include "llvm/Transforms/Utils/Local.h"
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using namespace llvm;
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#define DEBUG_TYPE "bypass-slow-division"
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namespace {
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struct DivOpInfo {
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bool SignedOp;
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Value *Dividend;
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Value *Divisor;
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DivOpInfo(bool InSignedOp, Value *InDividend, Value *InDivisor)
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: SignedOp(InSignedOp), Dividend(InDividend), Divisor(InDivisor) {}
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};
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struct DivPhiNodes {
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PHINode *Quotient;
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PHINode *Remainder;
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DivPhiNodes(PHINode *InQuotient, PHINode *InRemainder)
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: Quotient(InQuotient), Remainder(InRemainder) {}
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};
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}
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namespace llvm {
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template<>
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struct DenseMapInfo<DivOpInfo> {
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static bool isEqual(const DivOpInfo &Val1, const DivOpInfo &Val2) {
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return Val1.SignedOp == Val2.SignedOp &&
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Val1.Dividend == Val2.Dividend &&
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Val1.Divisor == Val2.Divisor;
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}
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static DivOpInfo getEmptyKey() {
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return DivOpInfo(false, nullptr, nullptr);
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}
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static DivOpInfo getTombstoneKey() {
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return DivOpInfo(true, nullptr, nullptr);
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}
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static unsigned getHashValue(const DivOpInfo &Val) {
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return (unsigned)(reinterpret_cast<uintptr_t>(Val.Dividend) ^
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reinterpret_cast<uintptr_t>(Val.Divisor)) ^
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(unsigned)Val.SignedOp;
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}
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};
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typedef DenseMap<DivOpInfo, DivPhiNodes> DivCacheTy;
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}
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// insertFastDiv - Substitutes the div/rem instruction with code that checks the
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// value of the operands and uses a shorter-faster div/rem instruction when
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// possible and the longer-slower div/rem instruction otherwise.
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static bool insertFastDiv(Instruction *I, IntegerType *BypassType,
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bool UseDivOp, bool UseSignedOp,
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DivCacheTy &PerBBDivCache) {
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Function *F = I->getParent()->getParent();
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// Get instruction operands
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Value *Dividend = I->getOperand(0);
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Value *Divisor = I->getOperand(1);
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if (isa<ConstantInt>(Divisor) ||
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(isa<ConstantInt>(Dividend) && isa<ConstantInt>(Divisor))) {
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// Operations with immediate values should have
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// been solved and replaced during compile time.
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return false;
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}
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// Basic Block is split before divide
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BasicBlock *MainBB = &*I->getParent();
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BasicBlock *SuccessorBB = MainBB->splitBasicBlock(I);
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// Add new basic block for slow divide operation
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BasicBlock *SlowBB =
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BasicBlock::Create(F->getContext(), "", MainBB->getParent(), SuccessorBB);
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SlowBB->moveBefore(SuccessorBB);
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IRBuilder<> SlowBuilder(SlowBB, SlowBB->begin());
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Value *SlowQuotientV;
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Value *SlowRemainderV;
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if (UseSignedOp) {
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SlowQuotientV = SlowBuilder.CreateSDiv(Dividend, Divisor);
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SlowRemainderV = SlowBuilder.CreateSRem(Dividend, Divisor);
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} else {
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SlowQuotientV = SlowBuilder.CreateUDiv(Dividend, Divisor);
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SlowRemainderV = SlowBuilder.CreateURem(Dividend, Divisor);
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}
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SlowBuilder.CreateBr(SuccessorBB);
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// Add new basic block for fast divide operation
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BasicBlock *FastBB =
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BasicBlock::Create(F->getContext(), "", MainBB->getParent(), SuccessorBB);
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FastBB->moveBefore(SlowBB);
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IRBuilder<> FastBuilder(FastBB, FastBB->begin());
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Value *ShortDivisorV = FastBuilder.CreateCast(Instruction::Trunc, Divisor,
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BypassType);
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Value *ShortDividendV = FastBuilder.CreateCast(Instruction::Trunc, Dividend,
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BypassType);
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// udiv/urem because optimization only handles positive numbers
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Value *ShortQuotientV = FastBuilder.CreateUDiv(ShortDividendV, ShortDivisorV);
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Value *ShortRemainderV = FastBuilder.CreateURem(ShortDividendV,
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ShortDivisorV);
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Value *FastQuotientV = FastBuilder.CreateCast(Instruction::ZExt,
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ShortQuotientV,
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Dividend->getType());
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Value *FastRemainderV = FastBuilder.CreateCast(Instruction::ZExt,
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ShortRemainderV,
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Dividend->getType());
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FastBuilder.CreateBr(SuccessorBB);
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// Phi nodes for result of div and rem
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IRBuilder<> SuccessorBuilder(SuccessorBB, SuccessorBB->begin());
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PHINode *QuoPhi = SuccessorBuilder.CreatePHI(I->getType(), 2);
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QuoPhi->addIncoming(SlowQuotientV, SlowBB);
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QuoPhi->addIncoming(FastQuotientV, FastBB);
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PHINode *RemPhi = SuccessorBuilder.CreatePHI(I->getType(), 2);
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RemPhi->addIncoming(SlowRemainderV, SlowBB);
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RemPhi->addIncoming(FastRemainderV, FastBB);
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// Replace I with appropriate phi node
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if (UseDivOp)
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I->replaceAllUsesWith(QuoPhi);
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else
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I->replaceAllUsesWith(RemPhi);
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I->eraseFromParent();
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// Combine operands into a single value with OR for value testing below
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MainBB->getInstList().back().eraseFromParent();
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IRBuilder<> MainBuilder(MainBB, MainBB->end());
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Value *OrV = MainBuilder.CreateOr(Dividend, Divisor);
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// BitMask is inverted to check if the operands are
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// larger than the bypass type
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uint64_t BitMask = ~BypassType->getBitMask();
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Value *AndV = MainBuilder.CreateAnd(OrV, BitMask);
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// Compare operand values and branch
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Value *ZeroV = ConstantInt::getSigned(Dividend->getType(), 0);
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Value *CmpV = MainBuilder.CreateICmpEQ(AndV, ZeroV);
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MainBuilder.CreateCondBr(CmpV, FastBB, SlowBB);
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// Cache phi nodes to be used later in place of other instances
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// of div or rem with the same sign, dividend, and divisor
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DivOpInfo Key(UseSignedOp, Dividend, Divisor);
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DivPhiNodes Value(QuoPhi, RemPhi);
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PerBBDivCache.insert(std::pair<DivOpInfo, DivPhiNodes>(Key, Value));
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return true;
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}
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// reuseOrInsertFastDiv - Reuses previously computed dividend or remainder from
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// the current BB if operands and operation are identical. Otherwise calls
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// insertFastDiv to perform the optimization and caches the resulting dividend
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// and remainder.
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static bool reuseOrInsertFastDiv(Instruction *I, IntegerType *BypassType,
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bool UseDivOp, bool UseSignedOp,
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DivCacheTy &PerBBDivCache) {
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// Get instruction operands
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DivOpInfo Key(UseSignedOp, I->getOperand(0), I->getOperand(1));
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DivCacheTy::iterator CacheI = PerBBDivCache.find(Key);
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if (CacheI == PerBBDivCache.end()) {
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// If previous instance does not exist, insert fast div
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return insertFastDiv(I, BypassType, UseDivOp, UseSignedOp, PerBBDivCache);
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}
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// Replace operation value with previously generated phi node
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DivPhiNodes &Value = CacheI->second;
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if (UseDivOp) {
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// Replace all uses of div instruction with quotient phi node
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I->replaceAllUsesWith(Value.Quotient);
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} else {
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// Replace all uses of rem instruction with remainder phi node
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I->replaceAllUsesWith(Value.Remainder);
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}
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// Remove redundant operation
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I->eraseFromParent();
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return true;
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}
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// bypassSlowDivision - This optimization identifies DIV instructions in a BB
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// that can be profitably bypassed and carried out with a shorter, faster
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// divide.
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bool llvm::bypassSlowDivision(
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BasicBlock *BB, const DenseMap<unsigned int, unsigned int> &BypassWidths) {
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DivCacheTy DivCache;
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bool MadeChange = false;
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Instruction* Next = &*BB->begin();
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while (Next != nullptr) {
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// We may add instructions immediately after I, but we want to skip over
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// them.
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Instruction* I = Next;
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Next = Next->getNextNode();
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// Get instruction details
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unsigned Opcode = I->getOpcode();
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bool UseDivOp = Opcode == Instruction::SDiv || Opcode == Instruction::UDiv;
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bool UseRemOp = Opcode == Instruction::SRem || Opcode == Instruction::URem;
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bool UseSignedOp = Opcode == Instruction::SDiv ||
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Opcode == Instruction::SRem;
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// Only optimize div or rem ops
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if (!UseDivOp && !UseRemOp)
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continue;
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// Skip division on vector types, only optimize integer instructions
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if (!I->getType()->isIntegerTy())
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continue;
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// Get bitwidth of div/rem instruction
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IntegerType *T = cast<IntegerType>(I->getType());
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unsigned int bitwidth = T->getBitWidth();
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// Continue if bitwidth is not bypassed
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DenseMap<unsigned int, unsigned int>::const_iterator BI = BypassWidths.find(bitwidth);
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if (BI == BypassWidths.end())
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continue;
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// Get type for div/rem instruction with bypass bitwidth
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IntegerType *BT = IntegerType::get(I->getContext(), BI->second);
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MadeChange |= reuseOrInsertFastDiv(I, BT, UseDivOp, UseSignedOp, DivCache);
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}
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// Above we eagerly create divs and rems, as pairs, so that we can efficiently
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// create divrem machine instructions. Now erase any unused divs / rems so we
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// don't leave extra instructions sitting around.
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for (auto &KV : DivCache)
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for (Instruction *Phi : {KV.second.Quotient, KV.second.Remainder})
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RecursivelyDeleteTriviallyDeadInstructions(Phi);
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return MadeChange;
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}
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