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58e1dd33cd
Summary: This is patch is part of a series to introduce an Alignment type. See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html See this patch for the introduction of the type: https://reviews.llvm.org/D64790 Reviewers: courbet Subscribers: arsenm, dylanmckay, sdardis, nemanjai, jvesely, nhaehnle, hiraditya, kbarton, jrtc27, atanasyan, Jim, kerbowa, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D77121
144 lines
5.2 KiB
TableGen
144 lines
5.2 KiB
TableGen
// RUN: llvm-tblgen -gen-dag-isel -I %p/../../include %s 2>&1 | FileCheck -check-prefix=SDAG %s
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// RUN: llvm-tblgen -gen-global-isel -optimize-match-table=false -I %p/../../include %s -o - < %s | FileCheck -check-prefix=GISEL %s
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include "llvm/Target/Target.td"
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def TestTargetInstrInfo : InstrInfo;
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def TestTarget : Target {
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let InstructionSet = TestTargetInstrInfo;
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}
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def R0 : Register<"r0"> { let Namespace = "MyTarget"; }
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def GPR32 : RegisterClass<"MyTarget", [i32], 32, (add R0)>;
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// With one address space
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def pat_frag_a : PatFrag <(ops node:$ptr), (load node:$ptr), [{}]> {
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let AddressSpaces = [ 999 ];
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let IsLoad = 1; // FIXME: Can this be inferred?
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let MemoryVT = i32;
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let MinAlignment = 2;
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}
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// With multiple address spaces
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def pat_frag_b : PatFrag <(ops node:$ptr), (load node:$ptr), [{}]> {
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let AddressSpaces = [ 123, 455 ];
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let IsLoad = 1; // FIXME: Can this be inferred?
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let MemoryVT = i32;
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}
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def inst_a : Instruction {
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let OutOperandList = (outs GPR32:$dst);
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let InOperandList = (ins GPR32:$src);
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}
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def inst_b : Instruction {
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let OutOperandList = (outs GPR32:$dst);
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let InOperandList = (ins GPR32:$src);
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}
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def inst_c : Instruction {
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let OutOperandList = (outs);
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let InOperandList = (ins GPR32:$src0, GPR32:$src1);
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}
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def inst_d : Instruction {
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let OutOperandList = (outs);
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let InOperandList = (ins GPR32:$src0, GPR32:$src1);
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}
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// SDAG: case 2: {
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// SDAG-NEXT: // Predicate_pat_frag_b
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// SDAG-NEXT: SDNode *N = Node;
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// SDAG-NEXT: (void)N;
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// SDAG-NEXT: unsigned AddrSpace = cast<MemSDNode>(N)->getAddressSpace();
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// SDAG-NEXT: if (AddrSpace != 123 && AddrSpace != 455)
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// SDAG-NEXT: return false;
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// SDAG-NEXT: if (cast<MemSDNode>(N)->getMemoryVT() != MVT::i32) return false;
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// SDAG-NEXT: return true;
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// GISEL: GIM_Try, /*On fail goto*//*Label 0*/ {{[0-9]+}}, // Rule ID 0 //
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// GISEL-NEXT: GIM_CheckNumOperands, /*MI*/0, /*Expected*/2,
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// GISEL-NEXT: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_LOAD,
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// GISEL-NEXT: GIM_CheckMemorySizeEqualToLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
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// GISEL-NEXT: GIM_CheckMemoryAddressSpace, /*MI*/0, /*MMO*/0, /*NumAddrSpace*/2, /*AddrSpace*/123, /*AddrSpace*/455,
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// GISEL-NEXT: GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/4,
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// GISEL-NEXT: GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
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def : Pat <
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(pat_frag_b GPR32:$src),
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(inst_b GPR32:$src)
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>;
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// SDAG: case 3: {
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// SDAG: // Predicate_pat_frag_a
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// SDAG-NEXT: SDNode *N = Node;
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// SDAG-NEXT: (void)N;
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// SDAG-NEXT: unsigned AddrSpace = cast<MemSDNode>(N)->getAddressSpace();
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// SDAG-NEXT: if (AddrSpace != 999)
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// SDAG-NEXT: return false;
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// SDAG-NEXT: if (cast<MemSDNode>(N)->getAlign() < Align(2))
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// SDAG-NEXT: return false;
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// SDAG-NEXT: if (cast<MemSDNode>(N)->getMemoryVT() != MVT::i32) return false;
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// SDAG-NEXT: return true;
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// GISEL: GIM_Try, /*On fail goto*//*Label 1*/ {{[0-9]+}}, // Rule ID 1 //
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// GISEL-NEXT: GIM_CheckNumOperands, /*MI*/0, /*Expected*/2,
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// GISEL-NEXT: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_LOAD,
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// GISEL-NEXT: GIM_CheckMemorySizeEqualToLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
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// GISEL-NEXT: GIM_CheckMemoryAddressSpace, /*MI*/0, /*MMO*/0, /*NumAddrSpace*/1, /*AddrSpace*/999,
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// GISEL-NEXT: GIM_CheckMemoryAlignment, /*MI*/0, /*MMO*/0, /*MinAlign*/2,
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// GISEL-NEXT: GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/4,
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// GISEL-NEXT: GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
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def : Pat <
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(pat_frag_a GPR32:$src),
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(inst_a GPR32:$src)
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>;
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def truncstorei16_addrspace : PatFrag<(ops node:$val, node:$ptr),
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(truncstore node:$val, node:$ptr)> {
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let IsStore = 1;
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let MemoryVT = i16;
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let AddressSpaces = [ 123, 455 ];
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}
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// Test truncstore without a specific MemoryVT
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// GISEL: GIM_Try, /*On fail goto*//*Label 2*/ {{[0-9]+}}, // Rule ID 2 //
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// GISEL-NEXT: GIM_CheckNumOperands, /*MI*/0, /*Expected*/2,
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// GISEL-NEXT: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_STORE,
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// GISEL-NEXT: GIM_CheckMemorySizeLessThanLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
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// GISEL-NEXT: GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
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// GISEL-NEXT: // MIs[0] src0
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// GISEL-NEXT: GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
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def : Pat <
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(truncstore GPR32:$src0, GPR32:$src1),
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(inst_c GPR32:$src0, GPR32:$src1)
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>;
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// Test non-truncstore has a size equal to LLT check.
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// GISEL: GIM_Try, /*On fail goto*//*Label 3*/ {{[0-9]+}}, // Rule ID 3 //
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// GISEL-NEXT: GIM_CheckNumOperands, /*MI*/0, /*Expected*/2,
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// GISEL-NEXT: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_STORE,
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// GISEL-NEXT: GIM_CheckMemorySizeEqualToLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
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def : Pat <
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(store GPR32:$src0, GPR32:$src1),
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(inst_d GPR32:$src0, GPR32:$src1)
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>;
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// Test truncstore with specific MemoryVT
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// GISEL: GIM_Try, /*On fail goto*//*Label 4*/ {{[0-9]+}}, // Rule ID 4 //
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// GISEL-NEXT: GIM_CheckNumOperands, /*MI*/0, /*Expected*/2,
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// GISEL-NEXT: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_STORE,
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// GISEL-NEXT: GIM_CheckMemorySizeLessThanLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
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// GISEL-NEXT: GIM_CheckMemoryAddressSpace, /*MI*/0, /*MMO*/0, /*NumAddrSpace*/2, /*AddrSpace*/123, /*AddrSpace*/455,
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// GISEL-NEXT: GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/2,
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def : Pat <
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(truncstorei16_addrspace GPR32:$src0, GPR32:$src1),
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(inst_c GPR32:$src0, GPR32:$src1)
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>;
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