| .. |
|
AArch64
|
VirtRegMap: Replace some identity copies with KILL instructions.
|
2016-07-09 00:19:07 +00:00 |
|
AMDGPU
|
AMDGPU: Merge / reorganize tests
|
2016-07-09 08:02:28 +00:00 |
|
ARM
|
Do not expand SDIV when compiling for minimum code size
|
2016-07-08 15:32:01 +00:00 |
|
BPF
|
[BPF] Remove exit-on-error from tests (PR27768, PR27769)
|
2016-05-30 08:28:34 +00:00 |
|
Generic
|
Move CodeGen test from Generic to X86 specific directory
|
2016-06-10 19:14:01 +00:00 |
|
Hexagon
|
[Hexagon] Equally-sized vectors are equivalent in ISel (except vNi1)
|
2016-06-27 15:08:22 +00:00 |
|
Inputs
|
|
|
|
Lanai
|
[lanai] Use peephole optimizer to generate more conditional ALU operations.
|
2016-07-07 23:36:04 +00:00 |
|
Mips
|
[mips][micromips] Implement LD, LLD, LWU, SD, DSRL, DSRL32 and DSRLV instructions
|
2016-06-27 08:23:28 +00:00 |
|
MIR
|
[lanai] Update test to use peephole-opt and not peephole-opts
|
2016-07-08 22:28:29 +00:00 |
|
MSP430
|
|
|
|
NVPTX
|
NVPTX: Remove the legacy ptx intrinsics
|
2016-07-07 16:40:17 +00:00 |
|
PowerPC
|
VirtRegMap: Replace some identity copies with KILL instructions.
|
2016-07-09 00:19:07 +00:00 |
|
SPARC
|
VirtRegMap: Replace some identity copies with KILL instructions.
|
2016-07-09 00:19:07 +00:00 |
|
SystemZ
|
[SystemZ] Remove AND mask of bottom 6 bits when result is used for shift/rotate
|
2016-07-06 18:13:11 +00:00 |
|
Thumb
|
[Thumb] Reapply r272251 with a fix for PR28348 (mk 2)
|
2016-07-05 12:37:13 +00:00 |
|
Thumb2
|
[Thumb] Reapply r272251 with a fix for PR28348 (mk 2)
|
2016-07-05 12:37:13 +00:00 |
|
WebAssembly
|
[WebAssembly] Emit type signatures for declared functions
|
2016-06-03 18:34:36 +00:00 |
|
WinEH
|
revert http://reviews.llvm.org/D21101
|
2016-06-30 17:52:24 +00:00 |
|
X86
|
[AVX512] Add support for lowering to 512-bit SHUFPS.
|
2016-07-10 05:55:53 +00:00 |
|
XCore
|
IR: Introduce Module::global_objects().
|
2016-06-22 20:29:42 +00:00 |
