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llvm-mirror/include
Jim Grosbach 8a78dc2600 TableGen: Allow conditional instruction pattern in multiclass.
Define a 'null_frag' SDPatternOperator node, which if referenced in an
instruction Pattern, results in the pattern being collapsed to be as-if
'[]' had been specified instead. This allows supporting a multiclass
definition where some instaniations have ISel patterns associated and
others do not.

For example,
multiclass myMulti<RegisterClass rc, SDPatternOperator OpNode = null_frag> {
  def _x : myI<(outs rc:), (ins rc:), []>;
  def _r : myI<(outs rc:), (ins rc:), [(set rc:, (OpNode rc:))]>;
}

defm foo : myMulti<GRa, not>;
defm bar : myMulti<GRb>;

llvm-svn: 160333
2012-07-17 00:47:06 +00:00
..
llvm TableGen: Allow conditional instruction pattern in multiclass. 2012-07-17 00:47:06 +00:00
llvm-c Move llvm/Support/IRBuilder.h -> llvm/IRBuilder.h 2012-06-29 12:38:19 +00:00