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04762a3cf5
This can happen in cases where TableGen generated asm matcher cannot check whether a register operand is in the right register class. e.g. mem operands. rdar://8204588 llvm-svn: 136292
93 lines
2.4 KiB
ArmAsm
93 lines
2.4 KiB
ArmAsm
// RUN: llvm-mc -triple x86_64-unknown-unknown --show-encoding %s | FileCheck %s
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// PR8283
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// CHECK: pavgusb %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0xbf]
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pavgusb %mm2, %mm1
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// CHECK: pavgusb 9(%esi,%edx), %mm3 # encoding: [0x67,0x0f,0x0f,0x5c,0x16,0x09,0xbf]
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pavgusb 9(%esi,%edx), %mm3
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// CHECK: pf2id %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0x1d]
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pf2id %mm2, %mm1
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// CHECK: pf2id 9(%esi,%edx), %mm3 # encoding: [0x67,0x0f,0x0f,0x5c,0x16,0x09,0x1d]
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pf2id 9(%esi,%edx), %mm3
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// CHECK: pfacc %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0xae]
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pfacc %mm2, %mm1
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// CHECK: pfadd %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0x9e]
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pfadd %mm2, %mm1
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// CHECK: pfcmpeq %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0xb0]
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pfcmpeq %mm2, %mm1
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// CHECK: pfcmpge %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0x90]
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pfcmpge %mm2, %mm1
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// CHECK: pfcmpgt %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0xa0]
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pfcmpgt %mm2, %mm1
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// CHECK: pfmax %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0xa4]
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pfmax %mm2, %mm1
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// CHECK: pfmin %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0x94]
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pfmin %mm2, %mm1
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// CHECK: pfmul %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0xb4]
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pfmul %mm2, %mm1
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// CHECK: pfrcp %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0x96]
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pfrcp %mm2, %mm1
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// CHECK: pfrcpit1 %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0xa6]
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pfrcpit1 %mm2, %mm1
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// CHECK: pfrcpit2 %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0xb6]
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pfrcpit2 %mm2, %mm1
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// CHECK: pfrsqit1 %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0xa7]
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pfrsqit1 %mm2, %mm1
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// CHECK: pfrsqrt %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0x97]
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pfrsqrt %mm2, %mm1
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// CHECK: pfsub %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0x9a]
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pfsub %mm2, %mm1
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// CHECK: pfsubr %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0xaa]
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pfsubr %mm2, %mm1
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// CHECK: pi2fd %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0x0d]
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pi2fd %mm2, %mm1
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// CHECK: pmulhrw %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0xb7]
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pmulhrw %mm2, %mm1
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// CHECK: femms # encoding: [0x0f,0x0e]
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femms
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// CHECK: prefetch (%rax) # encoding: [0x0f,0x0d,0x00]
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// CHECK: prefetchw (%rax) # encoding: [0x0f,0x0d,0x08]
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prefetch (%rax)
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prefetchw (%rax)
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// CHECK: pf2iw %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0x1c]
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pf2iw %mm2, %mm1
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// CHECK: pi2fw %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0x0c]
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pi2fw %mm2, %mm1
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// CHECK: pfnacc %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0x8a]
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pfnacc %mm2, %mm1
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// CHECK: pfpnacc %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0x8e]
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pfpnacc %mm2, %mm1
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// CHECK: pswapd %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0xbb]
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pswapd %mm2, %mm1
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