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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-23 19:23:23 +01:00
llvm-mirror/test/CodeGen
Benjamin Kramer 302eac4a38 Fix tests not to depend on specific regalloc or instruction order.
They were failing with -mcpu=atom.

llvm-svn: 192890
2013-10-17 12:41:05 +00:00
..
AArch64 [AArch64] Add support for NEON scalar negate instruction. 2013-10-16 21:04:39 +00:00
ARM Port to FileCheck. 2013-10-16 16:47:56 +00:00
CPP
Generic Change objectsize intrinsic to accept different address spaces. 2013-10-07 18:06:48 +00:00
Hexagon TBAA: remove !tbaa from testing cases when they are not needed. 2013-09-30 18:17:35 +00:00
Inputs
Mips Fix r192888: test/CodeGen/Mips/msa/3r_ld_st.ll should have been deleted 2013-10-17 12:36:35 +00:00
MSP430 Fix MSP430 calling convention to match MSPGCC 2013-10-15 08:19:39 +00:00
NVPTX [NVPTX] Switch from StrongPHIElimination to PHIElimination in NVPTXTargetMachine, and add some missing optimization passes to addOptimizedRegAlloc 2013-10-11 12:39:39 +00:00
PowerPC Replace sra with srl if a single sign bit is required 2013-10-17 11:16:57 +00:00
R600 R600: Fix a crash in the AMDILCFGStructurizer 2013-10-16 17:06:02 +00:00
SPARC [Sparc] Disable tail call optimization for sparc64. 2013-10-09 12:50:39 +00:00
SystemZ Replace sra with srl if a single sign bit is required 2013-10-17 11:16:57 +00:00
Thumb ARM: Use "dmb sy" for barriers on M-class CPUs 2013-08-28 14:39:19 +00:00
Thumb2 MachineSink: Fix and tweak critical-edge breaking heuristic. 2013-10-14 16:57:17 +00:00
X86 Fix tests not to depend on specific regalloc or instruction order. 2013-10-17 12:41:05 +00:00
XCore XCore target fix bug in emitArrayBound() causing segmentation fault 2013-10-11 10:27:13 +00:00